diff options
author | David Howells <dhowells@redhat.com> | 2009-04-09 20:48:06 -0400 |
---|---|---|
committer | David Howells <dhowells@redhat.com> | 2009-04-09 20:48:06 -0400 |
commit | e69cc9278831139660cb99bde52908f145338d77 (patch) | |
tree | fdc1f002b6036a2220d73c86a253886fa76015dc /include/asm-frv/io.h | |
parent | 187934655fa0637d4ef3967d4543c6dcccf33058 (diff) |
FRV: Move to arch/frv/include/asm/
Move arch headers from include/asm-frv/ to arch/frv/include/asm/.
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'include/asm-frv/io.h')
-rw-r--r-- | include/asm-frv/io.h | 392 |
1 files changed, 0 insertions, 392 deletions
diff --git a/include/asm-frv/io.h b/include/asm-frv/io.h deleted file mode 100644 index ca7475e73b5e..000000000000 --- a/include/asm-frv/io.h +++ /dev/null | |||
@@ -1,392 +0,0 @@ | |||
1 | /* io.h: FRV I/O operations | ||
2 | * | ||
3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. | ||
4 | * Written by David Howells (dhowells@redhat.com) | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * This gets interesting when talking to the PCI bus - the CPU is in big endian | ||
12 | * mode, the PCI bus is little endian and the hardware in the middle can do | ||
13 | * byte swapping | ||
14 | */ | ||
15 | #ifndef _ASM_IO_H | ||
16 | #define _ASM_IO_H | ||
17 | |||
18 | #ifdef __KERNEL__ | ||
19 | |||
20 | #include <linux/types.h> | ||
21 | #include <asm/virtconvert.h> | ||
22 | #include <asm/string.h> | ||
23 | #include <asm/mb-regs.h> | ||
24 | #include <linux/delay.h> | ||
25 | |||
26 | /* | ||
27 | * swap functions are sometimes needed to interface little-endian hardware | ||
28 | */ | ||
29 | |||
30 | static inline unsigned short _swapw(unsigned short v) | ||
31 | { | ||
32 | return ((v << 8) | (v >> 8)); | ||
33 | } | ||
34 | |||
35 | static inline unsigned long _swapl(unsigned long v) | ||
36 | { | ||
37 | return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24)); | ||
38 | } | ||
39 | |||
40 | //#define __iormb() asm volatile("membar") | ||
41 | //#define __iowmb() asm volatile("membar") | ||
42 | |||
43 | #define __raw_readb __builtin_read8 | ||
44 | #define __raw_readw __builtin_read16 | ||
45 | #define __raw_readl __builtin_read32 | ||
46 | |||
47 | #define __raw_writeb(datum, addr) __builtin_write8(addr, datum) | ||
48 | #define __raw_writew(datum, addr) __builtin_write16(addr, datum) | ||
49 | #define __raw_writel(datum, addr) __builtin_write32(addr, datum) | ||
50 | |||
51 | static inline void io_outsb(unsigned int addr, const void *buf, int len) | ||
52 | { | ||
53 | unsigned long __ioaddr = (unsigned long) addr; | ||
54 | const uint8_t *bp = buf; | ||
55 | |||
56 | while (len--) | ||
57 | __builtin_write8((volatile void __iomem *) __ioaddr, *bp++); | ||
58 | } | ||
59 | |||
60 | static inline void io_outsw(unsigned int addr, const void *buf, int len) | ||
61 | { | ||
62 | unsigned long __ioaddr = (unsigned long) addr; | ||
63 | const uint16_t *bp = buf; | ||
64 | |||
65 | while (len--) | ||
66 | __builtin_write16((volatile void __iomem *) __ioaddr, (*bp++)); | ||
67 | } | ||
68 | |||
69 | extern void __outsl_ns(unsigned int addr, const void *buf, int len); | ||
70 | extern void __outsl_sw(unsigned int addr, const void *buf, int len); | ||
71 | static inline void __outsl(unsigned int addr, const void *buf, int len, int swap) | ||
72 | { | ||
73 | unsigned long __ioaddr = (unsigned long) addr; | ||
74 | |||
75 | if (!swap) | ||
76 | __outsl_ns(__ioaddr, buf, len); | ||
77 | else | ||
78 | __outsl_sw(__ioaddr, buf, len); | ||
79 | } | ||
80 | |||
81 | static inline void io_insb(unsigned long addr, void *buf, int len) | ||
82 | { | ||
83 | uint8_t *bp = buf; | ||
84 | |||
85 | while (len--) | ||
86 | *bp++ = __builtin_read8((volatile void __iomem *) addr); | ||
87 | } | ||
88 | |||
89 | static inline void io_insw(unsigned long addr, void *buf, int len) | ||
90 | { | ||
91 | uint16_t *bp = buf; | ||
92 | |||
93 | while (len--) | ||
94 | *bp++ = __builtin_read16((volatile void __iomem *) addr); | ||
95 | } | ||
96 | |||
97 | extern void __insl_ns(unsigned long addr, void *buf, int len); | ||
98 | extern void __insl_sw(unsigned long addr, void *buf, int len); | ||
99 | static inline void __insl(unsigned long addr, void *buf, int len, int swap) | ||
100 | { | ||
101 | if (!swap) | ||
102 | __insl_ns(addr, buf, len); | ||
103 | else | ||
104 | __insl_sw(addr, buf, len); | ||
105 | } | ||
106 | |||
107 | #define mmiowb() mb() | ||
108 | |||
109 | /* | ||
110 | * make the short names macros so specific devices | ||
111 | * can override them as required | ||
112 | */ | ||
113 | |||
114 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) | ||
115 | { | ||
116 | memset((void __force *) addr, val, count); | ||
117 | } | ||
118 | |||
119 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) | ||
120 | { | ||
121 | memcpy(dst, (void __force *) src, count); | ||
122 | } | ||
123 | |||
124 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) | ||
125 | { | ||
126 | memcpy((void __force *) dst, src, count); | ||
127 | } | ||
128 | |||
129 | static inline uint8_t inb(unsigned long addr) | ||
130 | { | ||
131 | return __builtin_read8((void __iomem *)addr); | ||
132 | } | ||
133 | |||
134 | static inline uint16_t inw(unsigned long addr) | ||
135 | { | ||
136 | uint16_t ret = __builtin_read16((void __iomem *)addr); | ||
137 | |||
138 | if (__is_PCI_IO(addr)) | ||
139 | ret = _swapw(ret); | ||
140 | |||
141 | return ret; | ||
142 | } | ||
143 | |||
144 | static inline uint32_t inl(unsigned long addr) | ||
145 | { | ||
146 | uint32_t ret = __builtin_read32((void __iomem *)addr); | ||
147 | |||
148 | if (__is_PCI_IO(addr)) | ||
149 | ret = _swapl(ret); | ||
150 | |||
151 | return ret; | ||
152 | } | ||
153 | |||
154 | static inline void outb(uint8_t datum, unsigned long addr) | ||
155 | { | ||
156 | __builtin_write8((void __iomem *)addr, datum); | ||
157 | } | ||
158 | |||
159 | static inline void outw(uint16_t datum, unsigned long addr) | ||
160 | { | ||
161 | if (__is_PCI_IO(addr)) | ||
162 | datum = _swapw(datum); | ||
163 | __builtin_write16((void __iomem *)addr, datum); | ||
164 | } | ||
165 | |||
166 | static inline void outl(uint32_t datum, unsigned long addr) | ||
167 | { | ||
168 | if (__is_PCI_IO(addr)) | ||
169 | datum = _swapl(datum); | ||
170 | __builtin_write32((void __iomem *)addr, datum); | ||
171 | } | ||
172 | |||
173 | #define inb_p(addr) inb(addr) | ||
174 | #define inw_p(addr) inw(addr) | ||
175 | #define inl_p(addr) inl(addr) | ||
176 | #define outb_p(x,addr) outb(x,addr) | ||
177 | #define outw_p(x,addr) outw(x,addr) | ||
178 | #define outl_p(x,addr) outl(x,addr) | ||
179 | |||
180 | #define outsb(a,b,l) io_outsb(a,b,l) | ||
181 | #define outsw(a,b,l) io_outsw(a,b,l) | ||
182 | #define outsl(a,b,l) __outsl(a,b,l,0) | ||
183 | |||
184 | #define insb(a,b,l) io_insb(a,b,l) | ||
185 | #define insw(a,b,l) io_insw(a,b,l) | ||
186 | #define insl(a,b,l) __insl(a,b,l,0) | ||
187 | |||
188 | #define IO_SPACE_LIMIT 0xffffffff | ||
189 | |||
190 | static inline uint8_t readb(const volatile void __iomem *addr) | ||
191 | { | ||
192 | return __builtin_read8((__force void volatile __iomem *) addr); | ||
193 | } | ||
194 | |||
195 | static inline uint16_t readw(const volatile void __iomem *addr) | ||
196 | { | ||
197 | uint16_t ret = __builtin_read16((__force void volatile __iomem *)addr); | ||
198 | |||
199 | if (__is_PCI_MEM(addr)) | ||
200 | ret = _swapw(ret); | ||
201 | return ret; | ||
202 | } | ||
203 | |||
204 | static inline uint32_t readl(const volatile void __iomem *addr) | ||
205 | { | ||
206 | uint32_t ret = __builtin_read32((__force void volatile __iomem *)addr); | ||
207 | |||
208 | if (__is_PCI_MEM(addr)) | ||
209 | ret = _swapl(ret); | ||
210 | |||
211 | return ret; | ||
212 | } | ||
213 | |||
214 | #define readb_relaxed readb | ||
215 | #define readw_relaxed readw | ||
216 | #define readl_relaxed readl | ||
217 | |||
218 | static inline void writeb(uint8_t datum, volatile void __iomem *addr) | ||
219 | { | ||
220 | __builtin_write8(addr, datum); | ||
221 | if (__is_PCI_MEM(addr)) | ||
222 | __flush_PCI_writes(); | ||
223 | } | ||
224 | |||
225 | static inline void writew(uint16_t datum, volatile void __iomem *addr) | ||
226 | { | ||
227 | if (__is_PCI_MEM(addr)) | ||
228 | datum = _swapw(datum); | ||
229 | |||
230 | __builtin_write16(addr, datum); | ||
231 | if (__is_PCI_MEM(addr)) | ||
232 | __flush_PCI_writes(); | ||
233 | } | ||
234 | |||
235 | static inline void writel(uint32_t datum, volatile void __iomem *addr) | ||
236 | { | ||
237 | if (__is_PCI_MEM(addr)) | ||
238 | datum = _swapl(datum); | ||
239 | |||
240 | __builtin_write32(addr, datum); | ||
241 | if (__is_PCI_MEM(addr)) | ||
242 | __flush_PCI_writes(); | ||
243 | } | ||
244 | |||
245 | |||
246 | /* Values for nocacheflag and cmode */ | ||
247 | #define IOMAP_FULL_CACHING 0 | ||
248 | #define IOMAP_NOCACHE_SER 1 | ||
249 | #define IOMAP_NOCACHE_NONSER 2 | ||
250 | #define IOMAP_WRITETHROUGH 3 | ||
251 | |||
252 | extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); | ||
253 | |||
254 | static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size) | ||
255 | { | ||
256 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | ||
257 | } | ||
258 | |||
259 | static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size) | ||
260 | { | ||
261 | return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); | ||
262 | } | ||
263 | |||
264 | static inline void __iomem *ioremap_writethrough(unsigned long physaddr, unsigned long size) | ||
265 | { | ||
266 | return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); | ||
267 | } | ||
268 | |||
269 | static inline void __iomem *ioremap_fullcache(unsigned long physaddr, unsigned long size) | ||
270 | { | ||
271 | return __ioremap(physaddr, size, IOMAP_FULL_CACHING); | ||
272 | } | ||
273 | |||
274 | #define ioremap_wc ioremap_nocache | ||
275 | |||
276 | extern void iounmap(void volatile __iomem *addr); | ||
277 | |||
278 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) | ||
279 | { | ||
280 | return (void __iomem *) port; | ||
281 | } | ||
282 | |||
283 | static inline void ioport_unmap(void __iomem *p) | ||
284 | { | ||
285 | } | ||
286 | |||
287 | static inline void flush_write_buffers(void) | ||
288 | { | ||
289 | __asm__ __volatile__ ("membar" : : :"memory"); | ||
290 | } | ||
291 | |||
292 | /* | ||
293 | * do appropriate I/O accesses for token type | ||
294 | */ | ||
295 | static inline unsigned int ioread8(void __iomem *p) | ||
296 | { | ||
297 | return __builtin_read8(p); | ||
298 | } | ||
299 | |||
300 | static inline unsigned int ioread16(void __iomem *p) | ||
301 | { | ||
302 | uint16_t ret = __builtin_read16(p); | ||
303 | if (__is_PCI_addr(p)) | ||
304 | ret = _swapw(ret); | ||
305 | return ret; | ||
306 | } | ||
307 | |||
308 | static inline unsigned int ioread32(void __iomem *p) | ||
309 | { | ||
310 | uint32_t ret = __builtin_read32(p); | ||
311 | if (__is_PCI_addr(p)) | ||
312 | ret = _swapl(ret); | ||
313 | return ret; | ||
314 | } | ||
315 | |||
316 | static inline void iowrite8(u8 val, void __iomem *p) | ||
317 | { | ||
318 | __builtin_write8(p, val); | ||
319 | if (__is_PCI_MEM(p)) | ||
320 | __flush_PCI_writes(); | ||
321 | } | ||
322 | |||
323 | static inline void iowrite16(u16 val, void __iomem *p) | ||
324 | { | ||
325 | if (__is_PCI_addr(p)) | ||
326 | val = _swapw(val); | ||
327 | __builtin_write16(p, val); | ||
328 | if (__is_PCI_MEM(p)) | ||
329 | __flush_PCI_writes(); | ||
330 | } | ||
331 | |||
332 | static inline void iowrite32(u32 val, void __iomem *p) | ||
333 | { | ||
334 | if (__is_PCI_addr(p)) | ||
335 | val = _swapl(val); | ||
336 | __builtin_write32(p, val); | ||
337 | if (__is_PCI_MEM(p)) | ||
338 | __flush_PCI_writes(); | ||
339 | } | ||
340 | |||
341 | static inline void ioread8_rep(void __iomem *p, void *dst, unsigned long count) | ||
342 | { | ||
343 | io_insb((unsigned long) p, dst, count); | ||
344 | } | ||
345 | |||
346 | static inline void ioread16_rep(void __iomem *p, void *dst, unsigned long count) | ||
347 | { | ||
348 | io_insw((unsigned long) p, dst, count); | ||
349 | } | ||
350 | |||
351 | static inline void ioread32_rep(void __iomem *p, void *dst, unsigned long count) | ||
352 | { | ||
353 | __insl_ns((unsigned long) p, dst, count); | ||
354 | } | ||
355 | |||
356 | static inline void iowrite8_rep(void __iomem *p, const void *src, unsigned long count) | ||
357 | { | ||
358 | io_outsb((unsigned long) p, src, count); | ||
359 | } | ||
360 | |||
361 | static inline void iowrite16_rep(void __iomem *p, const void *src, unsigned long count) | ||
362 | { | ||
363 | io_outsw((unsigned long) p, src, count); | ||
364 | } | ||
365 | |||
366 | static inline void iowrite32_rep(void __iomem *p, const void *src, unsigned long count) | ||
367 | { | ||
368 | __outsl_ns((unsigned long) p, src, count); | ||
369 | } | ||
370 | |||
371 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | ||
372 | struct pci_dev; | ||
373 | extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); | ||
374 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) | ||
375 | { | ||
376 | } | ||
377 | |||
378 | |||
379 | /* | ||
380 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | ||
381 | * access | ||
382 | */ | ||
383 | #define xlate_dev_mem_ptr(p) __va(p) | ||
384 | |||
385 | /* | ||
386 | * Convert a virtual cached pointer to an uncached pointer | ||
387 | */ | ||
388 | #define xlate_dev_kmem_ptr(p) p | ||
389 | |||
390 | #endif /* __KERNEL__ */ | ||
391 | |||
392 | #endif /* _ASM_IO_H */ | ||