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authorDavid Howells <dhowells@redhat.com>2006-09-26 02:32:04 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 11:48:53 -0400
commit1bcbba306048ed86b935d57a95d887c23d52c94b (patch)
tree4c6e20b162415c79a177b72b97b6fb4d246a73b0 /include/asm-frv/cpu-irqs.h
parent8d6b5eeea5eb644232cbbbe1c927fdf051e60fa5 (diff)
[PATCH] FRV: Use the generic IRQ stuff
Make the FRV arch use the generic IRQ code rather than having its own routines for doing so. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-frv/cpu-irqs.h')
-rw-r--r--include/asm-frv/cpu-irqs.h54
1 files changed, 24 insertions, 30 deletions
diff --git a/include/asm-frv/cpu-irqs.h b/include/asm-frv/cpu-irqs.h
index 5cd691e1f8c4..478f3498fcfe 100644
--- a/include/asm-frv/cpu-irqs.h
+++ b/include/asm-frv/cpu-irqs.h
@@ -14,36 +14,6 @@
14 14
15#ifndef __ASSEMBLY__ 15#ifndef __ASSEMBLY__
16 16
17#include <asm/irq-routing.h>
18
19#define IRQ_BASE_CPU (NR_IRQ_ACTIONS_PER_GROUP * 0)
20
21/* IRQ IDs presented to drivers */
22enum {
23 IRQ_CPU__UNUSED = IRQ_BASE_CPU,
24 IRQ_CPU_UART0,
25 IRQ_CPU_UART1,
26 IRQ_CPU_TIMER0,
27 IRQ_CPU_TIMER1,
28 IRQ_CPU_TIMER2,
29 IRQ_CPU_DMA0,
30 IRQ_CPU_DMA1,
31 IRQ_CPU_DMA2,
32 IRQ_CPU_DMA3,
33 IRQ_CPU_DMA4,
34 IRQ_CPU_DMA5,
35 IRQ_CPU_DMA6,
36 IRQ_CPU_DMA7,
37 IRQ_CPU_EXTERNAL0,
38 IRQ_CPU_EXTERNAL1,
39 IRQ_CPU_EXTERNAL2,
40 IRQ_CPU_EXTERNAL3,
41 IRQ_CPU_EXTERNAL4,
42 IRQ_CPU_EXTERNAL5,
43 IRQ_CPU_EXTERNAL6,
44 IRQ_CPU_EXTERNAL7,
45};
46
47/* IRQ to level mappings */ 17/* IRQ to level mappings */
48#define IRQ_GDBSTUB_LEVEL 15 18#define IRQ_GDBSTUB_LEVEL 15
49#define IRQ_UART_LEVEL 13 19#define IRQ_UART_LEVEL 13
@@ -82,6 +52,30 @@ enum {
82#define IRQ_XIRQ6_LEVEL 7 52#define IRQ_XIRQ6_LEVEL 7
83#define IRQ_XIRQ7_LEVEL 8 53#define IRQ_XIRQ7_LEVEL 8
84 54
55/* IRQ IDs presented to drivers */
56#define IRQ_CPU__UNUSED IRQ_BASE_CPU
57#define IRQ_CPU_UART0 (IRQ_BASE_CPU + IRQ_UART0_LEVEL)
58#define IRQ_CPU_UART1 (IRQ_BASE_CPU + IRQ_UART1_LEVEL)
59#define IRQ_CPU_TIMER0 (IRQ_BASE_CPU + IRQ_TIMER0_LEVEL)
60#define IRQ_CPU_TIMER1 (IRQ_BASE_CPU + IRQ_TIMER1_LEVEL)
61#define IRQ_CPU_TIMER2 (IRQ_BASE_CPU + IRQ_TIMER2_LEVEL)
62#define IRQ_CPU_DMA0 (IRQ_BASE_CPU + IRQ_DMA0_LEVEL)
63#define IRQ_CPU_DMA1 (IRQ_BASE_CPU + IRQ_DMA1_LEVEL)
64#define IRQ_CPU_DMA2 (IRQ_BASE_CPU + IRQ_DMA2_LEVEL)
65#define IRQ_CPU_DMA3 (IRQ_BASE_CPU + IRQ_DMA3_LEVEL)
66#define IRQ_CPU_DMA4 (IRQ_BASE_CPU + IRQ_DMA4_LEVEL)
67#define IRQ_CPU_DMA5 (IRQ_BASE_CPU + IRQ_DMA5_LEVEL)
68#define IRQ_CPU_DMA6 (IRQ_BASE_CPU + IRQ_DMA6_LEVEL)
69#define IRQ_CPU_DMA7 (IRQ_BASE_CPU + IRQ_DMA7_LEVEL)
70#define IRQ_CPU_EXTERNAL0 (IRQ_BASE_CPU + IRQ_XIRQ0_LEVEL)
71#define IRQ_CPU_EXTERNAL1 (IRQ_BASE_CPU + IRQ_XIRQ1_LEVEL)
72#define IRQ_CPU_EXTERNAL2 (IRQ_BASE_CPU + IRQ_XIRQ2_LEVEL)
73#define IRQ_CPU_EXTERNAL3 (IRQ_BASE_CPU + IRQ_XIRQ3_LEVEL)
74#define IRQ_CPU_EXTERNAL4 (IRQ_BASE_CPU + IRQ_XIRQ4_LEVEL)
75#define IRQ_CPU_EXTERNAL5 (IRQ_BASE_CPU + IRQ_XIRQ5_LEVEL)
76#define IRQ_CPU_EXTERNAL6 (IRQ_BASE_CPU + IRQ_XIRQ6_LEVEL)
77#define IRQ_CPU_EXTERNAL7 (IRQ_BASE_CPU + IRQ_XIRQ7_LEVEL)
78
85#endif /* !__ASSEMBLY__ */ 79#endif /* !__ASSEMBLY__ */
86 80
87#endif /* _ASM_CPU_IRQS_H */ 81#endif /* _ASM_CPU_IRQS_H */