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authorMikael Starvik <mikael.starvik@axis.com>2005-07-27 14:44:44 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-27 19:26:01 -0400
commit51533b615e605d86154ec1b4e585c8ca1b0b15b7 (patch)
tree4a6d7d8494d2017632d83624fb71b36031e0e7e5 /include/asm-cris/arch-v32/tlb.h
parent5d01e6ce785884a5db5792cd2e5bb36fa82fe23c (diff)
[PATCH] CRIS update: new subarchitecture v32
New CRIS sub architecture named v32. From: Dave Jones <davej@redhat.com> Fix swapped kmalloc args Signed-off-by: Mikael Starvik <starvik@axis.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-cris/arch-v32/tlb.h')
-rw-r--r--include/asm-cris/arch-v32/tlb.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/include/asm-cris/arch-v32/tlb.h b/include/asm-cris/arch-v32/tlb.h
new file mode 100644
index 000000000000..4effb1253660
--- /dev/null
+++ b/include/asm-cris/arch-v32/tlb.h
@@ -0,0 +1,14 @@
1#ifndef _CRIS_ARCH_TLB_H
2#define _CRIS_ARCH_TLB_H
3
4/*
5 * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
6 * to store the "process" it belongs to (=> fast mm context switch). The
7 * last page_id is never used so we can make TLB entries that never matches.
8 */
9#define NUM_TLB_ENTRIES 64
10#define NUM_PAGEID 256
11#define INVALID_PAGEID 255
12#define NO_CONTEXT -1
13
14#endif /* _CRIS_ARCH_TLB_H */