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authorIngo Molnar <mingo@elte.hu>2008-07-25 07:08:16 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-25 07:08:16 -0400
commit10a010f6953b5a14ba2f0be40a4fce1bea220875 (patch)
tree19aadf718c796bc7fae0a1a1c970d84d67c541d4 /include/asm-cris/arch-v32/ide.h
parent510b37258dfd61693ca6c039865c78bd996e3718 (diff)
parentfb2e405fc1fc8b20d9c78eaa1c7fd5a297efde43 (diff)
Merge branch 'linus' into x86/x2apic
Conflicts: drivers/pci/dmar.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-cris/arch-v32/ide.h')
-rw-r--r--include/asm-cris/arch-v32/ide.h56
1 files changed, 0 insertions, 56 deletions
diff --git a/include/asm-cris/arch-v32/ide.h b/include/asm-cris/arch-v32/ide.h
deleted file mode 100644
index fb9c3627a5b4..000000000000
--- a/include/asm-cris/arch-v32/ide.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * linux/include/asm-cris/ide.h
3 *
4 * Copyright (C) 2000-2004 Axis Communications AB
5 *
6 * Authors: Bjorn Wesen, Mikael Starvik
7 *
8 */
9
10/*
11 * This file contains the ETRAX FS specific IDE code.
12 */
13
14#ifndef __ASMCRIS_IDE_H
15#define __ASMCRIS_IDE_H
16
17#ifdef __KERNEL__
18
19#include <asm/arch/hwregs/intr_vect.h>
20#include <asm/arch/hwregs/ata_defs.h>
21#include <asm/io.h>
22#include <asm-generic/ide_iops.h>
23
24
25/* ETRAX FS can support 4 IDE busses on the same pins (serialized) */
26
27#define MAX_HWIFS 4
28
29static inline int ide_default_irq(unsigned long base)
30{
31 /* all IDE busses share the same IRQ,
32 * this has the side-effect that ide-probe.c will cluster our 4 interfaces
33 * together in a hwgroup, and will serialize accesses. this is good, because
34 * we can't access more than one interface at the same time on ETRAX100.
35 */
36 return ATA_INTR_VECT;
37}
38
39static inline unsigned long ide_default_io_base(int index)
40{
41 reg_ata_rw_ctrl2 ctrl2 = {.sel = index};
42 /* we have no real I/O base address per interface, since all go through the
43 * same register. but in a bitfield in that register, we have the i/f number.
44 * so we can use the io_base to remember that bitfield.
45 */
46 ctrl2.sel = index;
47
48 return REG_TYPE_CONV(unsigned long, reg_ata_rw_ctrl2, ctrl2);
49}
50
51#define IDE_ARCH_ACK_INTR
52#define ide_ack_intr(hwif) ((hwif)->ack_intr(hwif))
53
54#endif /* __KERNEL__ */
55
56#endif /* __ASMCRIS_IDE_H */