aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-cris/arch-v10
diff options
context:
space:
mode:
authorJesper Nilsson <jesper.nilsson@axis.com>2008-01-28 10:49:39 -0500
committerJesper Nilsson <jesper.nilsson@axis.com>2008-02-08 05:06:37 -0500
commit0d9f2e6f8603a770e5af013d6e87526dc2a0dbf5 (patch)
tree25a77bef1319470d6e04f2611eff7b2a6fcd90fa /include/asm-cris/arch-v10
parenta1a7dc1d068425c0c453c7c602cc97a4254e0bba (diff)
CRIS: Rename LED macros to CRIS_LED to avoid name clash in io.h
This is done to avoid collision with linux/leds.h
Diffstat (limited to 'include/asm-cris/arch-v10')
-rw-r--r--include/asm-cris/arch-v10/io.h100
1 files changed, 53 insertions, 47 deletions
diff --git a/include/asm-cris/arch-v10/io.h b/include/asm-cris/arch-v10/io.h
index 11ef5b53d84e..c08c24265299 100644
--- a/include/asm-cris/arch-v10/io.h
+++ b/include/asm-cris/arch-v10/io.h
@@ -23,7 +23,7 @@ extern volatile unsigned long *port_cse1_addr;
23extern volatile unsigned long *port_csp0_addr; 23extern volatile unsigned long *port_csp0_addr;
24extern volatile unsigned long *port_csp4_addr; 24extern volatile unsigned long *port_csp4_addr;
25 25
26/* macro for setting regs through a shadow - 26/* macro for setting regs through a shadow -
27 * r = register name (like R_PORT_PA_DATA) 27 * r = register name (like R_PORT_PA_DATA)
28 * s = shadow name (like port_pa_data_shadow) 28 * s = shadow name (like port_pa_data_shadow)
29 * b = bit number 29 * b = bit number
@@ -38,83 +38,89 @@ extern volatile unsigned long *port_csp4_addr;
38#undef CONFIG_ETRAX_PA_LEDS 38#undef CONFIG_ETRAX_PA_LEDS
39#undef CONFIG_ETRAX_PB_LEDS 39#undef CONFIG_ETRAX_PB_LEDS
40#undef CONFIG_ETRAX_CSP0_LEDS 40#undef CONFIG_ETRAX_CSP0_LEDS
41#define LED_NETWORK_SET_G(x) 41#define CRIS_LED_NETWORK_SET_G(x)
42#define LED_NETWORK_SET_R(x) 42#define CRIS_LED_NETWORK_SET_R(x)
43#define LED_ACTIVE_SET_G(x) 43#define CRIS_LED_ACTIVE_SET_G(x)
44#define LED_ACTIVE_SET_R(x) 44#define CRIS_LED_ACTIVE_SET_R(x)
45#define LED_DISK_WRITE(x) 45#define CRIS_LED_DISK_WRITE(x)
46#define LED_DISK_READ(x) 46#define CRIS_LED_DISK_READ(x)
47#endif 47#endif
48 48
49#if !defined(CONFIG_ETRAX_CSP0_LEDS) 49#if !defined(CONFIG_ETRAX_CSP0_LEDS)
50#define LED_BIT_SET(x) 50#define CRIS_LED_BIT_SET(x)
51#define LED_BIT_CLR(x) 51#define CRIS_LED_BIT_CLR(x)
52#endif 52#endif
53 53
54#define LED_OFF 0x00 54#define CRIS_LED_OFF 0x00
55#define LED_GREEN 0x01 55#define CRIS_LED_GREEN 0x01
56#define LED_RED 0x02 56#define CRIS_LED_RED 0x02
57#define LED_ORANGE (LED_GREEN | LED_RED) 57#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
58 58
59#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R 59#if defined(CONFIG_ETRAX_NO_LEDS)
60#define LED_NETWORK_SET(x) \ 60#define CRIS_LED_NETWORK_SET(x)
61#else
62#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
63#define CRIS_LED_NETWORK_SET(x) \
61 do { \ 64 do { \
62 LED_NETWORK_SET_G((x) & LED_GREEN); \ 65 CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
63 } while (0) 66 } while (0)
64#else 67#else
65#define LED_NETWORK_SET(x) \ 68#define CRIS_LED_NETWORK_SET(x) \
66 do { \ 69 do { \
67 LED_NETWORK_SET_G((x) & LED_GREEN); \ 70 CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
68 LED_NETWORK_SET_R((x) & LED_RED); \ 71 CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED); \
69 } while (0) 72 } while (0)
70#endif 73#endif
71#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R 74#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
72#define LED_ACTIVE_SET(x) \ 75#define CRIS_LED_ACTIVE_SET(x) \
73 do { \ 76 do { \
74 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 77 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
75 } while (0) 78 } while (0)
76#else 79#else
77#define LED_ACTIVE_SET(x) \ 80#define CRIS_LED_ACTIVE_SET(x) \
78 do { \ 81 do { \
79 LED_ACTIVE_SET_G((x) & LED_GREEN); \ 82 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
80 LED_ACTIVE_SET_R((x) & LED_RED); \ 83 CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
81 } while (0) 84 } while (0)
82#endif 85#endif
86#endif
83 87
84#ifdef CONFIG_ETRAX_PA_LEDS 88#ifdef CONFIG_ETRAX_PA_LEDS
85#define LED_NETWORK_SET_G(x) \ 89#define CRIS_LED_NETWORK_SET_G(x) \
86 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x)) 90 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
87#define LED_NETWORK_SET_R(x) \ 91#define CRIS_LED_NETWORK_SET_R(x) \
88 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x)) 92 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
89#define LED_ACTIVE_SET_G(x) \ 93#define CRIS_LED_ACTIVE_SET_G(x) \
90 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x)) 94 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
91#define LED_ACTIVE_SET_R(x) \ 95#define CRIS_LED_ACTIVE_SET_R(x) \
92 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x)) 96 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
93#define LED_DISK_WRITE(x) \ 97#define CRIS_LED_DISK_WRITE(x) \
94 do{\ 98 do{\
95 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\ 99 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
96 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\ 100 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
97 }while(0) 101 }while(0)
98#define LED_DISK_READ(x) \ 102#define CRIS_LED_DISK_READ(x) \
99 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x)) 103 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
104 CONFIG_ETRAX_LED3G, !(x))
100#endif 105#endif
101 106
102#ifdef CONFIG_ETRAX_PB_LEDS 107#ifdef CONFIG_ETRAX_PB_LEDS
103#define LED_NETWORK_SET_G(x) \ 108#define CRIS_LED_NETWORK_SET_G(x) \
104 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x)) 109 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
105#define LED_NETWORK_SET_R(x) \ 110#define CRIS_LED_NETWORK_SET_R(x) \
106 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x)) 111 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
107#define LED_ACTIVE_SET_G(x) \ 112#define CRIS_LED_ACTIVE_SET_G(x) \
108 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x)) 113 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
109#define LED_ACTIVE_SET_R(x) \ 114#define CRIS_LED_ACTIVE_SET_R(x) \
110 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x)) 115 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
111#define LED_DISK_WRITE(x) \ 116#define CRIS_LED_DISK_WRITE(x) \
112 do{\ 117 do{\
113 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\ 118 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
114 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\ 119 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
115 }while(0) 120 }while(0)
116#define LED_DISK_READ(x) \ 121#define CRIS_LED_DISK_READ(x) \
117 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x)) 122 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
123 CONFIG_ETRAX_LED3G, !(x))
118#endif 124#endif
119 125
120#ifdef CONFIG_ETRAX_CSP0_LEDS 126#ifdef CONFIG_ETRAX_CSP0_LEDS
@@ -130,27 +136,27 @@ extern volatile unsigned long *port_csp4_addr;
130 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\ 136 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
131 (1 << CONFIG_ETRAX_LED12R )) 137 (1 << CONFIG_ETRAX_LED12R ))
132 138
133#define LED_NETWORK_SET_G(x) \ 139#define CRIS_LED_NETWORK_SET_G(x) \
134 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x)) 140 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
135#define LED_NETWORK_SET_R(x) \ 141#define CRIS_LED_NETWORK_SET_R(x) \
136 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x)) 142 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
137#define LED_ACTIVE_SET_G(x) \ 143#define CRIS_LED_ACTIVE_SET_G(x) \
138 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x)) 144 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
139#define LED_ACTIVE_SET_R(x) \ 145#define CRIS_LED_ACTIVE_SET_R(x) \
140 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x)) 146 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
141#define LED_DISK_WRITE(x) \ 147#define CRIS_LED_DISK_WRITE(x) \
142 do{\ 148 do{\
143 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\ 149 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
144 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\ 150 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
145 }while(0) 151 }while(0)
146#define LED_DISK_READ(x) \ 152#define CRIS_LED_DISK_READ(x) \
147 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x)) 153 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
148#define LED_BIT_SET(x)\ 154#define CRIS_LED_BIT_SET(x)\
149 do{\ 155 do{\
150 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\ 156 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
151 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\ 157 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
152 }while(0) 158 }while(0)
153#define LED_BIT_CLR(x)\ 159#define CRIS_LED_BIT_CLR(x)\
154 do{\ 160 do{\
155 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\ 161 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
156 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\ 162 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\