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authorRobin Getz <robin.getz@analog.com>2008-01-27 02:38:56 -0500
committerBryan Wu <bryan.wu@analog.com>2008-01-27 02:38:56 -0500
commit13fe24f37df20e580a5a364e67ec8cf3219d8f8c (patch)
treec790da8a840c6fdc3e6f5eacccadede92e329d7c /include/asm-blackfin
parentf53e86760e10abbe7ee98a5b3cb270fa6426fcdb (diff)
[Blackfin] arch: fix bug - trap_tests fails to recover on some tests.
http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3719 When the CPLBs get a miss, we do: - find a victim in the HW table - remove the victim - find the replacement in the software table - put it into the HW table. If we can't find a replacement in the software table, we accidently leave a duplicate in the HW table. This patch ensures that duplicate is marked as not valid. What we should do is find the replacement in the software table, before we find a victim in the HW table - but its too late in the release cycle to do that much restructuring of this code. Rather that duplicate code, connect Hardware Errors (irq5) into trap_c, so user space processes get killed properly. The rest of irq_panic() can be moved into traps.c (later) There is still a small corner case that causes problems when a pheriperal interrupt goes off a single cycle before a user space hardware error. This causes a kernel panic, rather than the user space process being killed. But, this checkin makes things work in 99.9% of the cases, and is a vast improvement from what is there today (which fails 100% of the time). Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r--include/asm-blackfin/traps.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-blackfin/traps.h b/include/asm-blackfin/traps.h
index ee1cbf73a9ab..f0e5f940d9ca 100644
--- a/include/asm-blackfin/traps.h
+++ b/include/asm-blackfin/traps.h
@@ -45,6 +45,10 @@
45#define VEC_CPLB_I_M (44) 45#define VEC_CPLB_I_M (44)
46#define VEC_CPLB_I_MHIT (45) 46#define VEC_CPLB_I_MHIT (45)
47#define VEC_ILL_RES (46) /* including unvalid supervisor mode insn */ 47#define VEC_ILL_RES (46) /* including unvalid supervisor mode insn */
48/* The hardware reserves (63) for future use - we use it to tell our
49 * normal exception handling code we have a hardware error
50 */
51#define VEC_HWERR (63)
48 52
49#ifndef __ASSEMBLY__ 53#ifndef __ASSEMBLY__
50 54