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authorBryan Wu <bryan.wu@analog.com>2007-12-05 02:45:12 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-12-05 12:21:19 -0500
commit131b17d42de6194fa960132c1f62c29923c4f20c (patch)
tree7606b689e111820328ff5c88a57192adce02cec2 /include/asm-blackfin
parentc24b2602af88db4489c6c3fb4b2a8e47fb15769b (diff)
spi: initial BF54x SPI support
Initial BF54x SPI support - support BF54x SPI0 - clean up some code (whitespace etc) - will support multiports in the future - start using portmux calls Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r--include/asm-blackfin/mach-bf548/defBF54x_base.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index da979cb62f7d..319a48590c9c 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -1644,8 +1644,25 @@
1644#define RESTART 0x20 /* Work Unit Transitions */ 1644#define RESTART 0x20 /* Work Unit Transitions */
1645#define DI_SEL 0x40 /* Data Interrupt Timing Select */ 1645#define DI_SEL 0x40 /* Data Interrupt Timing Select */
1646#define DI_EN 0x80 /* Data Interrupt Enable */ 1646#define DI_EN 0x80 /* Data Interrupt Enable */
1647
1647#define NDSIZE 0xf00 /* Flex Descriptor Size */ 1648#define NDSIZE 0xf00 /* Flex Descriptor Size */
1649#define NDSIZE_0 0x0000 /* Next Descriptor Size = 0 (Stop/Autobuffer) */
1650#define NDSIZE_1 0x0100 /* Next Descriptor Size = 1 */
1651#define NDSIZE_2 0x0200 /* Next Descriptor Size = 2 */
1652#define NDSIZE_3 0x0300 /* Next Descriptor Size = 3 */
1653#define NDSIZE_4 0x0400 /* Next Descriptor Size = 4 */
1654#define NDSIZE_5 0x0500 /* Next Descriptor Size = 5 */
1655#define NDSIZE_6 0x0600 /* Next Descriptor Size = 6 */
1656#define NDSIZE_7 0x0700 /* Next Descriptor Size = 7 */
1657#define NDSIZE_8 0x0800 /* Next Descriptor Size = 8 */
1658#define NDSIZE_9 0x0900 /* Next Descriptor Size = 9 */
1659
1648#define DMAFLOW 0xf000 /* Next Operation */ 1660#define DMAFLOW 0xf000 /* Next Operation */
1661#define DMAFLOW_STOP 0x0000 /* Stop Mode */
1662#define DMAFLOW_AUTO 0x1000 /* Autobuffer Mode */
1663#define DMAFLOW_ARRAY 0x4000 /* Descriptor Array Mode */
1664#define DMAFLOW_SMALL 0x6000 /* Small Model Descriptor List Mode */
1665#define DMAFLOW_LARGE 0x7000 /* Large Model Descriptor List Mode */
1649 1666
1650/* Bit masks for DMAx_IRQ_STATUS, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */ 1667/* Bit masks for DMAx_IRQ_STATUS, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */
1651 1668