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authorMichael Hennerich <michael.hennerich@analog.com>2007-05-21 06:09:16 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-21 12:50:21 -0400
commitd1b945fdb62f3e6852fea5a8779c0151ac1e55a8 (patch)
treed7c46472f4015534f383a724f79ee36454fe58bf /include/asm-blackfin
parent9ae246cd85e05d3fb31b9770588c1fe0914872fe (diff)
Blackfin arch: Move write to VR_CTL closer to IDLE
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r--include/asm-blackfin/mach-bf533/cdefBF532.h6
-rw-r--r--include/asm-blackfin/mach-bf537/cdefBF534.h6
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h6
3 files changed, 12 insertions, 6 deletions
diff --git a/include/asm-blackfin/mach-bf533/cdefBF532.h b/include/asm-blackfin/mach-bf533/cdefBF532.h
index 1d7c494ceb64..521bdb4d297d 100644
--- a/include/asm-blackfin/mach-bf533/cdefBF532.h
+++ b/include/asm-blackfin/mach-bf533/cdefBF532.h
@@ -63,12 +63,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
63{ 63{
64 unsigned long flags, iwr; 64 unsigned long flags, iwr;
65 65
66 bfin_write16(VR_CTL, val);
67 __builtin_bfin_ssync();
68 /* Enable the PLL Wakeup bit in SIC IWR */ 66 /* Enable the PLL Wakeup bit in SIC IWR */
69 iwr = bfin_read32(SIC_IWR); 67 iwr = bfin_read32(SIC_IWR);
70 /* Only allow PPL Wakeup) */ 68 /* Only allow PPL Wakeup) */
71 bfin_write32(SIC_IWR, IWR_ENABLE(0)); 69 bfin_write32(SIC_IWR, IWR_ENABLE(0));
70
71 bfin_write16(VR_CTL, val);
72 __builtin_bfin_ssync();
73
72 local_irq_save(flags); 74 local_irq_save(flags);
73 asm("IDLE;"); 75 asm("IDLE;");
74 local_irq_restore(flags); 76 local_irq_restore(flags);
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 7b658c175f85..9a167f3b224e 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -51,12 +51,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
51{ 51{
52 unsigned long flags, iwr; 52 unsigned long flags, iwr;
53 53
54 bfin_write16(VR_CTL, val);
55 __builtin_bfin_ssync();
56 /* Enable the PLL Wakeup bit in SIC IWR */ 54 /* Enable the PLL Wakeup bit in SIC IWR */
57 iwr = bfin_read32(SIC_IWR); 55 iwr = bfin_read32(SIC_IWR);
58 /* Only allow PPL Wakeup) */ 56 /* Only allow PPL Wakeup) */
59 bfin_write32(SIC_IWR, IWR_ENABLE(0)); 57 bfin_write32(SIC_IWR, IWR_ENABLE(0));
58
59 bfin_write16(VR_CTL, val);
60 __builtin_bfin_ssync();
61
60 local_irq_save(flags); 62 local_irq_save(flags);
61 asm("IDLE;"); 63 asm("IDLE;");
62 local_irq_restore(flags); 64 local_irq_restore(flags);
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 5dc0ed835447..b14f872e5703 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -59,12 +59,14 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
59{ 59{
60 unsigned long flags, iwr; 60 unsigned long flags, iwr;
61 61
62 bfin_write16(VR_CTL, val);
63 __builtin_bfin_ssync();
64 /* Enable the PLL Wakeup bit in SIC IWR */ 62 /* Enable the PLL Wakeup bit in SIC IWR */
65 iwr = bfin_read32(SICA_IWR0); 63 iwr = bfin_read32(SICA_IWR0);
66 /* Only allow PPL Wakeup) */ 64 /* Only allow PPL Wakeup) */
67 bfin_write32(SICA_IWR0, IWR_ENABLE(0)); 65 bfin_write32(SICA_IWR0, IWR_ENABLE(0));
66
67 bfin_write16(VR_CTL, val);
68 __builtin_bfin_ssync();
69
68 local_irq_save(flags); 70 local_irq_save(flags);
69 asm("IDLE;"); 71 asm("IDLE;");
70 local_irq_restore(flags); 72 local_irq_restore(flags);