diff options
author | Mike Frysinger <vapier.adi@gmail.com> | 2008-04-23 17:03:26 -0400 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-04-23 17:03:26 -0400 |
commit | 5d1617b247aa63698618215a9f39ecf905d55779 (patch) | |
tree | 63629a804f6be1d9950725a86f9e67dd5328da6a /include/asm-blackfin | |
parent | f950f605b9cd0e4bb53b902d2b2edbbb3e6079fc (diff) |
[Blackfin] arch: merge ip0x-specific board changes
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r-- | include/asm-blackfin/mach-bf533/mem_init.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf533/mem_init.h b/include/asm-blackfin/mach-bf533/mem_init.h index 1620dae5254d..f8f31901fca9 100644 --- a/include/asm-blackfin/mach-bf533/mem_init.h +++ b/include/asm-blackfin/mach-bf533/mem_init.h | |||
@@ -29,7 +29,8 @@ | |||
29 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 29 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | #if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || CONFIG_MEM_GENERIC_BOARD) | 32 | #if (CONFIG_MEM_MT48LC16M16A2TG_75 || CONFIG_MEM_MT48LC64M4A2FB_7E || \ |
33 | CONFIG_MEM_MT48LC32M16A2TG_75 || CONFIG_MEM_GENERIC_BOARD) | ||
33 | #if (CONFIG_SCLK_HZ > 119402985) | 34 | #if (CONFIG_SCLK_HZ > 119402985) |
34 | #define SDRAM_tRP TRP_2 | 35 | #define SDRAM_tRP TRP_2 |
35 | #define SDRAM_tRP_num 2 | 36 | #define SDRAM_tRP_num 2 |
@@ -118,6 +119,13 @@ | |||
118 | #define SDRAM_CL CL_3 | 119 | #define SDRAM_CL CL_3 |
119 | #endif | 120 | #endif |
120 | 121 | ||
122 | #if (CONFIG_MEM_MT48LC32M16A2TG_75) | ||
123 | /*SDRAM INFORMATION: */ | ||
124 | #define SDRAM_Tref 64 /* Refresh period in milliseconds */ | ||
125 | #define SDRAM_NRA 8192 /* Number of row addresses in SDRAM */ | ||
126 | #define SDRAM_CL CL_3 | ||
127 | #endif | ||
128 | |||
121 | #if (CONFIG_MEM_GENERIC_BOARD) | 129 | #if (CONFIG_MEM_GENERIC_BOARD) |
122 | /*SDRAM INFORMATION: Modify this for your board */ | 130 | /*SDRAM INFORMATION: Modify this for your board */ |
123 | #define SDRAM_Tref 64 /* Refresh period in milliseconds */ | 131 | #define SDRAM_Tref 64 /* Refresh period in milliseconds */ |