diff options
author | Sonic Zhang <sonic.zhang@analog.com> | 2008-04-24 15:06:10 -0400 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-04-24 15:06:10 -0400 |
commit | 37167e6411f15fc8d8da8acabfd7cdd17668ffad (patch) | |
tree | 04952c29952d995885369fde761b0b417c0de36f /include/asm-blackfin | |
parent | 25bb23bfd061075955ca68b6a336c542d56263b3 (diff) |
[Blackfin] arch: Fix bug - Properly calculate DDR clock.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin')
-rw-r--r-- | include/asm-blackfin/mach-bf548/mem_init.h | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/include/asm-blackfin/mach-bf548/mem_init.h b/include/asm-blackfin/mach-bf548/mem_init.h index befc2903d5a5..ab0b863eee66 100644 --- a/include/asm-blackfin/mach-bf548/mem_init.h +++ b/include/asm-blackfin/mach-bf548/mem_init.h | |||
@@ -29,16 +29,19 @@ | |||
29 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | 29 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
30 | */ | 30 | */ |
31 | #define MIN_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000 + 1) | 31 | #define MIN_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000 + 1) |
32 | #define MAX_DDR_SCLK(x) (x*(CONFIG_SCLK_HZ/1000/1000)/1000) | ||
33 | #define DDR_CLK_HZ(x) (1000*1000*1000/x) | ||
32 | 34 | ||
33 | #if (CONFIG_MEM_MT46V32M16_6T) | 35 | #if (CONFIG_MEM_MT46V32M16_6T) |
34 | #define DDR_SIZE DEVSZ_512 | 36 | #define DDR_SIZE DEVSZ_512 |
35 | #define DDR_WIDTH DEVWD_16 | 37 | #define DDR_WIDTH DEVWD_16 |
38 | #define DDR_MAX_tCK 13 | ||
36 | 39 | ||
37 | #define DDR_tRC DDR_TRC(MIN_DDR_SCLK(60)) | 40 | #define DDR_tRC DDR_TRC(MIN_DDR_SCLK(60)) |
38 | #define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(42)) | 41 | #define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(42)) |
39 | #define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15)) | 42 | #define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15)) |
40 | #define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(72)) | 43 | #define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(72)) |
41 | #define DDR_tREFI DDR_TREFI(MIN_DDR_SCLK(7800)) | 44 | #define DDR_tREFI DDR_TREFI(MAX_DDR_SCLK(7800)) |
42 | 45 | ||
43 | #define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15)) | 46 | #define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15)) |
44 | #define DDR_tWTR DDR_TWTR(1) | 47 | #define DDR_tWTR DDR_TWTR(1) |
@@ -49,12 +52,13 @@ | |||
49 | #if (CONFIG_MEM_MT46V32M16_5B) | 52 | #if (CONFIG_MEM_MT46V32M16_5B) |
50 | #define DDR_SIZE DEVSZ_512 | 53 | #define DDR_SIZE DEVSZ_512 |
51 | #define DDR_WIDTH DEVWD_16 | 54 | #define DDR_WIDTH DEVWD_16 |
55 | #define DDR_MAX_tCK 13 | ||
52 | 56 | ||
53 | #define DDR_tRC DDR_TRC(MIN_DDR_SCLK(55)) | 57 | #define DDR_tRC DDR_TRC(MIN_DDR_SCLK(55)) |
54 | #define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(40)) | 58 | #define DDR_tRAS DDR_TRAS(MIN_DDR_SCLK(40)) |
55 | #define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15)) | 59 | #define DDR_tRP DDR_TRP(MIN_DDR_SCLK(15)) |
56 | #define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(70)) | 60 | #define DDR_tRFC DDR_TRFC(MIN_DDR_SCLK(70)) |
57 | #define DDR_tREFI DDR_TREFI(MIN_DDR_SCLK(7800)) | 61 | #define DDR_tREFI DDR_TREFI(MAX_DDR_SCLK(7800)) |
58 | 62 | ||
59 | #define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15)) | 63 | #define DDR_tRCD DDR_TRCD(MIN_DDR_SCLK(15)) |
60 | #define DDR_tWTR DDR_TWTR(2) | 64 | #define DDR_tWTR DDR_TWTR(2) |
@@ -65,6 +69,7 @@ | |||
65 | #if (CONFIG_MEM_GENERIC_BOARD) | 69 | #if (CONFIG_MEM_GENERIC_BOARD) |
66 | #define DDR_SIZE DEVSZ_512 | 70 | #define DDR_SIZE DEVSZ_512 |
67 | #define DDR_WIDTH DEVWD_16 | 71 | #define DDR_WIDTH DEVWD_16 |
72 | #define DDR_MAX_tCK 13 | ||
68 | 73 | ||
69 | #define DDR_tRCD DDR_TRCD(3) | 74 | #define DDR_tRCD DDR_TRCD(3) |
70 | #define DDR_tWTR DDR_TWTR(2) | 75 | #define DDR_tWTR DDR_TWTR(2) |
@@ -77,14 +82,15 @@ | |||
77 | #define DDR_tREFI DDR_TREFI(1288) | 82 | #define DDR_tREFI DDR_TREFI(1288) |
78 | #endif | 83 | #endif |
79 | 84 | ||
80 | #if (CONFIG_SCLK_HZ <= 133333333) | 85 | #if (CONFIG_SCLK_HZ < DDR_CLK_HZ(DDR_MAX_tCK)) |
81 | #define DDR_CL CL_2 | 86 | # error "CONFIG_SCLK_HZ is too small (<DDR_CLK_HZ(DDR_MAX_tCK) Hz)." |
82 | #elif (CONFIG_SCLK_HZ <= 166666666) | 87 | #elif(CONFIG_SCLK_HZ <= 133333333) |
83 | #define DDR_CL CL_2_5 | 88 | # define DDR_CL CL_2 |
84 | #else | 89 | #else |
85 | #define DDR_CL CL_3 | 90 | # error "CONFIG_SCLK_HZ is too large (>133333333 Hz)." |
86 | #endif | 91 | #endif |
87 | 92 | ||
93 | |||
88 | #define mem_DDRCTL0 (DDR_tRP | DDR_tRAS | DDR_tRC | DDR_tRFC | DDR_tREFI) | 94 | #define mem_DDRCTL0 (DDR_tRP | DDR_tRAS | DDR_tRC | DDR_tRFC | DDR_tREFI) |
89 | #define mem_DDRCTL1 (DDR_DATWIDTH | EXTBANK_1 | DDR_SIZE | DDR_WIDTH | DDR_tWTR \ | 95 | #define mem_DDRCTL1 (DDR_DATWIDTH | EXTBANK_1 | DDR_SIZE | DDR_WIDTH | DDR_tWTR \ |
90 | | DDR_tMRD | DDR_tWR | DDR_tRCD) | 96 | | DDR_tMRD | DDR_tWR | DDR_tRCD) |