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authorMichael Hennerich <michael.hennerich@analog.com>2008-05-09 12:11:59 -0400
committerBryan Wu <cooloney@kernel.org>2008-05-09 12:11:59 -0400
commit56f87713022a6bdf00b0a50d086fdaddb54e8e5c (patch)
tree7687e2bcf5bcad67f14367f4208e001cd490010c /include/asm-blackfin/mach-bf561
parente4f7c0bf1f2e8a1b184a33ab60e874391d70f86c (diff)
[Blackfin] arch: remove useless IRQ_SW_INT defines
IRQ_SW_INT1 and IRQ_SW_INT2 obsolete: Remove useless defines Fix SYS_IRQS Keep numbering scheme, so we don't break existing configurations. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf561')
-rw-r--r--include/asm-blackfin/mach-bf561/irq.h13
1 files changed, 6 insertions, 7 deletions
diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h
index 83f0383957d2..6698389c5564 100644
--- a/include/asm-blackfin/mach-bf561/irq.h
+++ b/include/asm-blackfin/mach-bf561/irq.h
@@ -118,12 +118,13 @@
118 Supplemental interrupt 0 IVG7 69 118 Supplemental interrupt 0 IVG7 69
119 supplemental interrupt 1 IVG7 70 119 supplemental interrupt 1 IVG7 70
120 120
121 Software Interrupt 1 IVG14 71 121 Softirq IVG14
122 Software Interrupt 2 IVG15 72 * 122 System Call --
123 (lowest priority) 123 (lowest priority) IVG15
124
124 **********************************************************************/ 125 **********************************************************************/
125 126
126#define SYS_IRQS 72 127#define SYS_IRQS 71
127#define NR_PERI_INTS 64 128#define NR_PERI_INTS 64
128 129
129/* 130/*
@@ -237,9 +238,7 @@
237#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */ 238#define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */
238#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */ 239#define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */
239#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */ 240#define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */
240#define IRQ_SW_INT1 71 /* Software Interrupt 1 */ 241
241#define IRQ_SW_INT2 72 /* Software Interrupt 2 */
242 /* reserved for SYSCALL */
243#define IRQ_PF0 73 242#define IRQ_PF0 73
244#define IRQ_PF1 74 243#define IRQ_PF1 74
245#define IRQ_PF2 75 244#define IRQ_PF2 75