Blackfin arch: cplb and map header file cleanup

 - remove duplicated defines for the BF561
 - generalize L2 support (so that it works for BF54x) and mark it executable
 - add support for reading/executing the Boot ROM sections
   (since it has data/functions we may need at runtime)
 - and fixup names for each map

Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>

2 files changed, 5 insertions, 19 deletions

diff --git a/include/asm-blackfin/mach-bf561/bf561.h b/include/asm-blackfin/mach-bf561/bf561.h
index 17e1d5dcef02..3ef9e5f36136 100644
--- a/include/asm-blackfin/mach-bf561/bf561.h
+++ b/include/asm-blackfin/mach-bf561/bf561.h
@@ -33,25 +33,6 @@
 #define SUPPORTED_REVID         0x3
 
 #define OFFSET_(x) ((x) & 0x0000FFFF)
-#define L1_ISRAM                0xFFA00000
-#define L1_ISRAM_END            0xFFA04000
-#define DATA_BANKA_SRAM         0xFF800000
-#define DATA_BANKA_SRAM_END     0xFF804000
-#define DATA_BANKB_SRAM         0xFF900000
-#define DATA_BANKB_SRAM_END     0xFF904000
-#define L1_DSRAMA               0xFF800000
-#define L1_DSRAMA_END           0xFF804000
-#define L1_DSRAMB               0xFF900000
-#define L1_DSRAMB_END           0xFF904000
-#define L2_SRAM                 0xFEB00000
-#define L2_SRAM_END             0xFEB20000
-#define AMB_FLASH               0x20000000
-#define AMB_FLASH_END           0x21000000
-#define AMB_FLASH_LENGTH        0x01000000
-#define L1_ISRAM_LENGTH         0x4000
-#define L1_DSRAMA_LENGTH        0x4000
-#define L1_DSRAMB_LENGTH        0x4000
-#define L2_SRAM_LENGTH          0x20000
 
 /*some misc defines*/
 #define IMASK_IVG15             0x8000
diff --git a/include/asm-blackfin/mach-bf561/mem_map.h b/include/asm-blackfin/mach-bf561/mem_map.h
index 300a3a90d61c..c26d8486cc4b 100644
--- a/include/asm-blackfin/mach-bf561/mem_map.h
+++ b/include/asm-blackfin/mach-bf561/mem_map.h
@@ -19,6 +19,11 @@
 #define ASYNC_BANK0_BASE        0x20000000       /* Async Bank 0 */
 #define ASYNC_BANK0_SIZE        0x04000000      /* 64M */
 
+/* Boot ROM Memory */
+
+#define BOOT_ROM_START          0xEF000000
+#define BOOT_ROM_LENGTH         0x800
+
 /* Level 1 Memory */
 
 #ifdef CONFIG_BFIN_ICACHE