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authorMike Frysinger <michael.frysinger@analog.com>2007-07-24 23:57:42 -0400
committerBryan Wu <bryan.wu@analog.com>2007-07-24 23:57:42 -0400
commitd5148ffa600e6a655b458bedc593020e0574f967 (patch)
treee53d7e8c7e18eef3d4fe3077b3f68005d16f9bf0 /include/asm-blackfin/mach-bf561/cdefBF561.h
parent60e9356d770ca3622fe5e84680b78fc376e53fbf (diff)
Blackfin arch: use the [CS]SYNC() macros which include anomaly workarounds rather than __builtin_bfin_[cs]sync()
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf561/cdefBF561.h')
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 73d4d65249cd..2efcd2c663ab 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -67,7 +67,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
67 bfin_write32(SICA_IWR1, 0); 67 bfin_write32(SICA_IWR1, 0);
68 68
69 bfin_write16(VR_CTL, val); 69 bfin_write16(VR_CTL, val);
70 __builtin_bfin_ssync(); 70 SSYNC();
71 71
72 local_irq_save(flags); 72 local_irq_save(flags);
73 asm("IDLE;"); 73 asm("IDLE;");