diff options
| author | Bryan Wu <bryan.wu@analog.com> | 2007-10-10 12:30:56 -0400 |
|---|---|---|
| committer | Bryan Wu <bryan.wu@analog.com> | 2007-10-10 12:30:56 -0400 |
| commit | 1d487f468de75b8a5c664db60e106935f9dc753b (patch) | |
| tree | 4b610ba2550b997893250ace494e94cc07f66e5d /include/asm-blackfin/mach-bf548 | |
| parent | b7b2d344e7f7027497547a8b786a407047ee5e26 (diff) | |
Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf548')
| -rw-r--r-- | include/asm-blackfin/mach-bf548/defBF544.h | 1 | ||||
| -rw-r--r-- | include/asm-blackfin/mach-bf548/defBF548.h | 2 | ||||
| -rw-r--r-- | include/asm-blackfin/mach-bf548/defBF549.h | 2 | ||||
| -rw-r--r-- | include/asm-blackfin/mach-bf548/defBF54x_base.h | 3 |
4 files changed, 8 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/defBF544.h b/include/asm-blackfin/mach-bf548/defBF544.h index dd955dcd39b8..760307e34b9e 100644 --- a/include/asm-blackfin/mach-bf548/defBF544.h +++ b/include/asm-blackfin/mach-bf548/defBF544.h | |||
| @@ -81,6 +81,7 @@ | |||
| 81 | 81 | ||
| 82 | /* Two Wire Interface Registers (TWI1) */ | 82 | /* Two Wire Interface Registers (TWI1) */ |
| 83 | 83 | ||
| 84 | #define TWI1_REGBASE 0xffc02200 | ||
| 84 | #define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ | 85 | #define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ |
| 85 | #define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ | 86 | #define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ |
| 86 | #define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ | 87 | #define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ |
diff --git a/include/asm-blackfin/mach-bf548/defBF548.h b/include/asm-blackfin/mach-bf548/defBF548.h index 8d4214e0807c..70af33c963b0 100644 --- a/include/asm-blackfin/mach-bf548/defBF548.h +++ b/include/asm-blackfin/mach-bf548/defBF548.h | |||
| @@ -120,6 +120,7 @@ | |||
| 120 | 120 | ||
| 121 | /* Two Wire Interface Registers (TWI1) */ | 121 | /* Two Wire Interface Registers (TWI1) */ |
| 122 | 122 | ||
| 123 | #define TWI1_REGBASE 0xffc02200 | ||
| 123 | #define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ | 124 | #define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ |
| 124 | #define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ | 125 | #define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ |
| 125 | #define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ | 126 | #define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ |
| @@ -139,6 +140,7 @@ | |||
| 139 | 140 | ||
| 140 | /* SPI2 Registers */ | 141 | /* SPI2 Registers */ |
| 141 | 142 | ||
| 143 | #define SPI2_REGBASE 0xffc02400 | ||
| 142 | #define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ | 144 | #define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ |
| 143 | #define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ | 145 | #define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ |
| 144 | #define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ | 146 | #define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ |
diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h index c2f4734da48d..50b3fe55ef0c 100644 --- a/include/asm-blackfin/mach-bf548/defBF549.h +++ b/include/asm-blackfin/mach-bf548/defBF549.h | |||
| @@ -121,6 +121,7 @@ | |||
| 121 | 121 | ||
| 122 | /* Two Wire Interface Registers (TWI1) */ | 122 | /* Two Wire Interface Registers (TWI1) */ |
| 123 | 123 | ||
| 124 | #define TWI1_REGBASE 0xffc02200 | ||
| 124 | #define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ | 125 | #define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ |
| 125 | #define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ | 126 | #define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ |
| 126 | #define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ | 127 | #define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ |
| @@ -140,6 +141,7 @@ | |||
| 140 | 141 | ||
| 141 | /* SPI2 Registers */ | 142 | /* SPI2 Registers */ |
| 142 | 143 | ||
| 144 | #define SPI2_REGBASE 0xffc02400 | ||
| 143 | #define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ | 145 | #define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ |
| 144 | #define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ | 146 | #define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ |
| 145 | #define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ | 147 | #define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ |
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h index 895ddd40a838..e2632db74baa 100644 --- a/include/asm-blackfin/mach-bf548/defBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h | |||
| @@ -109,6 +109,7 @@ | |||
| 109 | 109 | ||
| 110 | /* SPI0 Registers */ | 110 | /* SPI0 Registers */ |
| 111 | 111 | ||
| 112 | #define SPI0_REGBASE 0xffc00500 | ||
| 112 | #define SPI0_CTL 0xffc00500 /* SPI0 Control Register */ | 113 | #define SPI0_CTL 0xffc00500 /* SPI0 Control Register */ |
| 113 | #define SPI0_FLG 0xffc00504 /* SPI0 Flag Register */ | 114 | #define SPI0_FLG 0xffc00504 /* SPI0 Flag Register */ |
| 114 | #define SPI0_STAT 0xffc00508 /* SPI0 Status Register */ | 115 | #define SPI0_STAT 0xffc00508 /* SPI0 Status Register */ |
| @@ -121,6 +122,7 @@ | |||
| 121 | 122 | ||
| 122 | /* Two Wire Interface Registers (TWI0) */ | 123 | /* Two Wire Interface Registers (TWI0) */ |
| 123 | 124 | ||
| 125 | #define TWI0_REGBASE 0xffc00700 | ||
| 124 | #define TWI0_CLKDIV 0xffc00700 /* Clock Divider Register */ | 126 | #define TWI0_CLKDIV 0xffc00700 /* Clock Divider Register */ |
| 125 | #define TWI0_CONTROL 0xffc00704 /* TWI Control Register */ | 127 | #define TWI0_CONTROL 0xffc00704 /* TWI Control Register */ |
| 126 | #define TWI0_SLAVE_CTRL 0xffc00708 /* TWI Slave Mode Control Register */ | 128 | #define TWI0_SLAVE_CTRL 0xffc00708 /* TWI Slave Mode Control Register */ |
| @@ -978,6 +980,7 @@ | |||
| 978 | 980 | ||
| 979 | /* SPI1 Registers */ | 981 | /* SPI1 Registers */ |
| 980 | 982 | ||
| 983 | #define SPI1_REGBASE 0xffc02300 | ||
| 981 | #define SPI1_CTL 0xffc02300 /* SPI1 Control Register */ | 984 | #define SPI1_CTL 0xffc02300 /* SPI1 Control Register */ |
| 982 | #define SPI1_FLG 0xffc02304 /* SPI1 Flag Register */ | 985 | #define SPI1_FLG 0xffc02304 /* SPI1 Flag Register */ |
| 983 | #define SPI1_STAT 0xffc02308 /* SPI1 Status Register */ | 986 | #define SPI1_STAT 0xffc02308 /* SPI1 Status Register */ |