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authorBryan Wu <bryan.wu@analog.com>2007-10-21 12:02:14 -0400
committerBryan Wu <bryan.wu@analog.com>2007-10-21 12:02:14 -0400
commit452af71f36685c932a5cce540a48c1818df6533f (patch)
treec466051e5be2b193c6fe41afc5335011dce1f6ea /include/asm-blackfin/mach-bf548
parent780431e397c82df7e20ee17536b97a08f97ef8ba (diff)
Blackfin arch: dma add some API and cleanup bf54x DMA definition
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf548')
-rw-r--r--include/asm-blackfin/mach-bf548/defBF549.h2
-rw-r--r--include/asm-blackfin/mach-bf548/defBF54x_base.h2
-rw-r--r--include/asm-blackfin/mach-bf548/dma.h2
3 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h
index 50b3fe55ef0c..4e46d657e50e 100644
--- a/include/asm-blackfin/mach-bf548/defBF549.h
+++ b/include/asm-blackfin/mach-bf548/defBF549.h
@@ -1178,7 +1178,7 @@
1178 1178
1179/* Bit masks for HOST_STATUS */ 1179/* Bit masks for HOST_STATUS */
1180 1180
1181#define READY 0x1 /* DMA Ready */ 1181#define DMA_READY 0x1 /* DMA Ready */
1182#define FIFOFULL 0x2 /* FIFO Full */ 1182#define FIFOFULL 0x2 /* FIFO Full */
1183#define FIFOEMPTY 0x4 /* FIFO Empty */ 1183#define FIFOEMPTY 0x4 /* FIFO Empty */
1184#define DMA_COMPLETE 0x8 /* DMA Complete */ 1184#define DMA_COMPLETE 0x8 /* DMA Complete */
diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h
index d40db5cc5d5f..1d365c844ffe 100644
--- a/include/asm-blackfin/mach-bf548/defBF54x_base.h
+++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h
@@ -3303,7 +3303,7 @@
3303 3303
3304#define MFD 0xf000 /* Multi channel Frame Delay */ 3304#define MFD 0xf000 /* Multi channel Frame Delay */
3305#define FSDR 0x80 /* Frame Sync to Data Relationship */ 3305#define FSDR 0x80 /* Frame Sync to Data Relationship */
3306#define MCMEM 0x10 /* Multi channel Frame Mode Enable */ 3306#define MCMEN 0x10 /* Multi channel Frame Mode Enable */
3307#define MCDRXPE 0x8 /* Multi channel DMA Receive Packing */ 3307#define MCDRXPE 0x8 /* Multi channel DMA Receive Packing */
3308#define MCDTXPE 0x4 /* Multi channel DMA Transmit Packing */ 3308#define MCDTXPE 0x4 /* Multi channel DMA Transmit Packing */
3309#define MCCRM 0x3 /* 2X Clock Recovery Mode */ 3309#define MCCRM 0x3 /* 2X Clock Recovery Mode */
diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h
index 14cb10cc24ae..4d97d3aa97cd 100644
--- a/include/asm-blackfin/mach-bf548/dma.h
+++ b/include/asm-blackfin/mach-bf548/dma.h
@@ -70,5 +70,5 @@
70#define MAX_BLACKFIN_DMA_CHANNEL 32 70#define MAX_BLACKFIN_DMA_CHANNEL 32
71 71
72extern int channel2irq(unsigned int channel); 72extern int channel2irq(unsigned int channel);
73extern struct dma_register *base_addr[]; 73extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
74#endif 74#endif