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authorBryan Wu <bryan.wu@analog.com>2007-10-10 12:30:56 -0400
committerBryan Wu <bryan.wu@analog.com>2007-10-10 12:30:56 -0400
commit1d487f468de75b8a5c664db60e106935f9dc753b (patch)
tree4b610ba2550b997893250ace494e94cc07f66e5d /include/asm-blackfin/mach-bf548/defBF549.h
parentb7b2d344e7f7027497547a8b786a407047ee5e26 (diff)
Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf548/defBF549.h')
-rw-r--r--include/asm-blackfin/mach-bf548/defBF549.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h
index c2f4734da48d..50b3fe55ef0c 100644
--- a/include/asm-blackfin/mach-bf548/defBF549.h
+++ b/include/asm-blackfin/mach-bf548/defBF549.h
@@ -121,6 +121,7 @@
121 121
122/* Two Wire Interface Registers (TWI1) */ 122/* Two Wire Interface Registers (TWI1) */
123 123
124#define TWI1_REGBASE 0xffc02200
124#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */ 125#define TWI1_CLKDIV 0xffc02200 /* Clock Divider Register */
125#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */ 126#define TWI1_CONTROL 0xffc02204 /* TWI Control Register */
126#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */ 127#define TWI1_SLAVE_CTRL 0xffc02208 /* TWI Slave Mode Control Register */
@@ -140,6 +141,7 @@
140 141
141/* SPI2 Registers */ 142/* SPI2 Registers */
142 143
144#define SPI2_REGBASE 0xffc02400
143#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */ 145#define SPI2_CTL 0xffc02400 /* SPI2 Control Register */
144#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */ 146#define SPI2_FLG 0xffc02404 /* SPI2 Flag Register */
145#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */ 147#define SPI2_STAT 0xffc02408 /* SPI2 Status Register */