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authorBryan Wu <cooloney@kernel.org>2008-03-26 19:25:21 -0400
committerBryan Wu <cooloney@kernel.org>2008-03-26 19:25:21 -0400
commitb594272c5e2837b6856b93520303c5981c852327 (patch)
tree08ab78fa93f4485a9eb8fa8d8b1700c0b7ee739c /include/asm-blackfin/mach-bf537
parent904656cda10ce985e6bc8b16488b58236eaec8e2 (diff)
[Blackfin] arch: remove TWI I2C register accessing helper macros, because we moved to use i2c new-style interface
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf537')
-rw-r--r--include/asm-blackfin/mach-bf537/cdefBF534.h34
1 files changed, 1 insertions, 33 deletions
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 78227bc855df..048d26a61fd1 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -858,39 +858,7 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
858#define bfin_read_PPI_FRAME() bfin_read16(PPI_FRAME) 858#define bfin_read_PPI_FRAME() bfin_read16(PPI_FRAME)
859#define bfin_write_PPI_FRAME(val) bfin_write16(PPI_FRAME,val) 859#define bfin_write_PPI_FRAME(val) bfin_write16(PPI_FRAME,val)
860 860
861/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ 861/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
862#define bfin_read_TWI_CLKDIV() bfin_read16(TWI_CLKDIV)
863#define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI_CLKDIV,val)
864#define bfin_read_TWI_CONTROL() bfin_read16(TWI_CONTROL)
865#define bfin_write_TWI_CONTROL(val) bfin_write16(TWI_CONTROL,val)
866#define bfin_read_TWI_SLAVE_CTL() bfin_read16(TWI_SLAVE_CTL)
867#define bfin_write_TWI_SLAVE_CTL(val) bfin_write16(TWI_SLAVE_CTL,val)
868#define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI_SLAVE_STAT)
869#define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI_SLAVE_STAT,val)
870#define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI_SLAVE_ADDR)
871#define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI_SLAVE_ADDR,val)
872#define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI_MASTER_CTL)
873#define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI_MASTER_CTL,val)
874#define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI_MASTER_STAT)
875#define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI_MASTER_STAT,val)
876#define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI_MASTER_ADDR)
877#define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI_MASTER_ADDR,val)
878#define bfin_read_TWI_INT_STAT() bfin_read16(TWI_INT_STAT)
879#define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI_INT_STAT,val)
880#define bfin_read_TWI_INT_MASK() bfin_read16(TWI_INT_MASK)
881#define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI_INT_MASK,val)
882#define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI_FIFO_CTL)
883#define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI_FIFO_CTL,val)
884#define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI_FIFO_STAT)
885#define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI_FIFO_STAT,val)
886#define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI_XMT_DATA8)
887#define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI_XMT_DATA8,val)
888#define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI_XMT_DATA16)
889#define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI_XMT_DATA16,val)
890#define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI_RCV_DATA8)
891#define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI_RCV_DATA8,val)
892#define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI_RCV_DATA16)
893#define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI_RCV_DATA16,val)
894 862
895/* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */ 863/* General Purpose I/O Port G (0xFFC01500 - 0xFFC015FF) */
896#define bfin_read_PORTGIO() bfin_read16(PORTGIO) 864#define bfin_read_PORTGIO() bfin_read16(PORTGIO)