diff options
author | Robin Getz <robin.getz@analog.com> | 2007-06-20 23:34:16 -0400 |
---|---|---|
committer | Bryan Wu <bryan.wu@analog.com> | 2007-06-20 23:34:16 -0400 |
commit | 4bf3f3cbb6add01d3e6a18c73f594b73113b14f2 (patch) | |
tree | a80839f98a64052f4d004a5207da2731fe556908 /include/asm-blackfin/mach-bf537 | |
parent | 0864a4e201b1ea442f4c8b887418a29f67e24d30 (diff) |
Blackfin arch: update ANOMALY handling
update lists for 533, 537, and add SSYNC workaround into assembly files.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf537')
-rw-r--r-- | include/asm-blackfin/mach-bf537/anomaly.h | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/include/asm-blackfin/mach-bf537/anomaly.h b/include/asm-blackfin/mach-bf537/anomaly.h index 7f040f5ba018..4453e614c3b1 100644 --- a/include/asm-blackfin/mach-bf537/anomaly.h +++ b/include/asm-blackfin/mach-bf537/anomaly.h | |||
@@ -73,8 +73,13 @@ | |||
73 | control */ | 73 | control */ |
74 | #define ANOMALY_05000283 /* A system MMR write is stalled indefinitely when | 74 | #define ANOMALY_05000283 /* A system MMR write is stalled indefinitely when |
75 | killed in a particular stage*/ | 75 | killed in a particular stage*/ |
76 | #define ANOMALY_05000310 /* False hardware errors caused by fetches at the | ||
77 | * boundary of reserved memory */ | ||
76 | #define ANOMALY_05000312 /* Errors when SSYNC, CSYNC, or loads to LT, LB and LC | 78 | #define ANOMALY_05000312 /* Errors when SSYNC, CSYNC, or loads to LT, LB and LC |
77 | registers are interrupted */ | 79 | registers are interrupted */ |
80 | #define ANOMALY_05000313 /* PPI is level sensitive on first transfer */ | ||
81 | #define ANOMALY_05000322 /* EMAC RMII mode at 10-Base-T speed: RX frames not | ||
82 | * received properly */ | ||
78 | #endif | 83 | #endif |
79 | 84 | ||
80 | #if defined(CONFIG_BF_REV_0_2) | 85 | #if defined(CONFIG_BF_REV_0_2) |
@@ -114,7 +119,21 @@ | |||
114 | DMA system instability */ | 119 | DMA system instability */ |
115 | #define ANOMALY_05000280 /* SPI Master boot mode does not work well with | 120 | #define ANOMALY_05000280 /* SPI Master boot mode does not work well with |
116 | Atmel Dataflash devices */ | 121 | Atmel Dataflash devices */ |
117 | 122 | #define ANOMALY_05000281 /* False Hardware Error Exception when ISR context | |
123 | * is not restored */ | ||
124 | #define ANOMALY_05000282 /* Memory DMA corruption with 32-bit data and traffic | ||
125 | * control */ | ||
126 | #define ANOMALY_05000283 /* System MMR Write Is Stalled Indefinitely When | ||
127 | * Killed in a Particular Stage */ | ||
128 | #define ANOMALY_05000285 /* New Feature: EMAC TX DMA Word Alignment | ||
129 | * (Not Available On Older Silicon) */ | ||
130 | #define ANOMALY_05000288 /* SPORTs may receive bad data if FIFOs fill up */ | ||
131 | #define ANOMALY_05000315 /* Killed System MMR Write Completes Erroneously | ||
132 | * On Next System MMR Access */ | ||
133 | #define ANOMALY_05000316 /* EMAC RMII mode: collisions occur in Full Duplex | ||
134 | * mode */ | ||
135 | #define ANOMALY_05000321 /* EMAC RMII mode: TX frames in half duplex fail with | ||
136 | * status No Carrier */ | ||
118 | #endif /* CONFIG_BF_REV_0_2 */ | 137 | #endif /* CONFIG_BF_REV_0_2 */ |
119 | 138 | ||
120 | #endif /* _MACH_ANOMALY_H_ */ | 139 | #endif /* _MACH_ANOMALY_H_ */ |