diff options
author | Michael Hennerich <michael.hennerich@analog.com> | 2008-07-14 04:51:57 -0400 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-07-14 04:51:57 -0400 |
commit | 68e2fc78e5055740126df8eab0d31005495756c9 (patch) | |
tree | 0d43976ff1d3ae8535445f9bcb1687f657f33337 /include/asm-blackfin/mach-bf537 | |
parent | 260d5d3517c67c5b68b4e28c5d3e1e3b73976a90 (diff) |
Blackfin arch: Fix bug - Kernel does not boot if re-program clocks
Don't write conflicting data to EBIU_SDBCTL after the SDRAM is
configured. This can cause data corruption, since we might change SDRAM
row and column addressing modes.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf537')
-rw-r--r-- | include/asm-blackfin/mach-bf537/mem_init.h | 27 |
1 files changed, 0 insertions, 27 deletions
diff --git a/include/asm-blackfin/mach-bf537/mem_init.h b/include/asm-blackfin/mach-bf537/mem_init.h index 9ad979d416c6..f67698f670ca 100644 --- a/include/asm-blackfin/mach-bf537/mem_init.h +++ b/include/asm-blackfin/mach-bf537/mem_init.h | |||
@@ -139,33 +139,6 @@ | |||
139 | #define SDRAM_CL CL_3 | 139 | #define SDRAM_CL CL_3 |
140 | #endif | 140 | #endif |
141 | 141 | ||
142 | #if (CONFIG_MEM_SIZE == 128) | ||
143 | #define SDRAM_SIZE EBSZ_128 | ||
144 | #endif | ||
145 | #if (CONFIG_MEM_SIZE == 64) | ||
146 | #define SDRAM_SIZE EBSZ_64 | ||
147 | #endif | ||
148 | #if (CONFIG_MEM_SIZE == 32) | ||
149 | #define SDRAM_SIZE EBSZ_32 | ||
150 | #endif | ||
151 | #if (CONFIG_MEM_SIZE == 16) | ||
152 | #define SDRAM_SIZE EBSZ_16 | ||
153 | #endif | ||
154 | #if (CONFIG_MEM_ADD_WIDTH == 11) | ||
155 | #define SDRAM_WIDTH EBCAW_11 | ||
156 | #endif | ||
157 | #if (CONFIG_MEM_ADD_WIDTH == 10) | ||
158 | #define SDRAM_WIDTH EBCAW_10 | ||
159 | #endif | ||
160 | #if (CONFIG_MEM_ADD_WIDTH == 9) | ||
161 | #define SDRAM_WIDTH EBCAW_9 | ||
162 | #endif | ||
163 | #if (CONFIG_MEM_ADD_WIDTH == 8) | ||
164 | #define SDRAM_WIDTH EBCAW_8 | ||
165 | #endif | ||
166 | |||
167 | #define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE) | ||
168 | |||
169 | /* Equation from section 17 (p17-46) of BF533 HRM */ | 142 | /* Equation from section 17 (p17-46) of BF533 HRM */ |
170 | #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) | 143 | #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) |
171 | 144 | ||