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authorMike Frysinger <michael.frysinger@analog.com>2007-05-21 06:09:24 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-21 12:50:22 -0400
commit95e493c00ac0d2371c3f627fdb99d776d29a8166 (patch)
tree285b194c0dd0243338dc6ff9b21e2d92c807b82b /include/asm-blackfin/mach-bf537
parent30870b93cd76bdfa7385f8d471345f5f6269fb00 (diff)
Blackfin arch: finish removing p* volatile defines for MMRs
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf537')
-rw-r--r--include/asm-blackfin/mach-bf537/cdefBF534.h3
-rw-r--r--include/asm-blackfin/mach-bf537/cdefBF537.h3
2 files changed, 0 insertions, 6 deletions
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h
index 9a167f3b224e..d4d3663c1100 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF534.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF534.h
@@ -75,7 +75,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
75#define bfin_write_SWRST(val) bfin_write16(SWRST,val) 75#define bfin_write_SWRST(val) bfin_write16(SWRST,val)
76#define bfin_read_SYSCR() bfin_read16(SYSCR) 76#define bfin_read_SYSCR() bfin_read16(SYSCR)
77#define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) 77#define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
78#define pSIC_RVECT ((void * volatile *)SIC_RVECT)
79#define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT) 78#define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT)
80#define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val) 79#define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val)
81#define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK) 80#define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK)
@@ -400,10 +399,8 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
400#define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val) 399#define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val)
401 400
402/* DMA Traffic Control Registers */ 401/* DMA Traffic Control Registers */
403#define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER)
404#define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER) 402#define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER)
405#define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val) 403#define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val)
406#define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT)
407#define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT) 404#define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT)
408#define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val) 405#define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val)
409 406
diff --git a/include/asm-blackfin/mach-bf537/cdefBF537.h b/include/asm-blackfin/mach-bf537/cdefBF537.h
index 932a1b6b5d14..b8fc949a991f 100644
--- a/include/asm-blackfin/mach-bf537/cdefBF537.h
+++ b/include/asm-blackfin/mach-bf537/cdefBF537.h
@@ -40,7 +40,6 @@
40 40
41/* Include Macro "Defines" For EMAC (Unique to BF536/BF537 */ 41/* Include Macro "Defines" For EMAC (Unique to BF536/BF537 */
42/* 10/100 Ethernet Controller (0xFFC03000 - 0xFFC031FF) */ 42/* 10/100 Ethernet Controller (0xFFC03000 - 0xFFC031FF) */
43#define pEMAC_OPMODE ((volatile unsigned long *)EMAC_OPMODE)
44#define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE) 43#define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE)
45#define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE,val) 44#define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE,val)
46#define bfin_read_EMAC_ADDRLO() bfin_read32(EMAC_ADDRLO) 45#define bfin_read_EMAC_ADDRLO() bfin_read32(EMAC_ADDRLO)
@@ -80,7 +79,6 @@
80#define bfin_read_EMAC_WKUP_FFCRC1() bfin_read32(EMAC_WKUP_FFCRC1) 79#define bfin_read_EMAC_WKUP_FFCRC1() bfin_read32(EMAC_WKUP_FFCRC1)
81#define bfin_write_EMAC_WKUP_FFCRC1(val) bfin_write32(EMAC_WKUP_FFCRC1,val) 80#define bfin_write_EMAC_WKUP_FFCRC1(val) bfin_write32(EMAC_WKUP_FFCRC1,val)
82 81
83#define pEMAC_SYSCTL ((volatile unsigned long *)EMAC_SYSCTL)
84#define bfin_read_EMAC_SYSCTL() bfin_read32(EMAC_SYSCTL) 82#define bfin_read_EMAC_SYSCTL() bfin_read32(EMAC_SYSCTL)
85#define bfin_write_EMAC_SYSCTL(val) bfin_write32(EMAC_SYSCTL,val) 83#define bfin_write_EMAC_SYSCTL(val) bfin_write32(EMAC_SYSCTL,val)
86#define bfin_read_EMAC_SYSTAT() bfin_read32(EMAC_SYSTAT) 84#define bfin_read_EMAC_SYSTAT() bfin_read32(EMAC_SYSTAT)
@@ -147,7 +145,6 @@
147#define bfin_write_EMAC_RXC_SHORT(val) bfin_write32(EMAC_RXC_SHORT,val) 145#define bfin_write_EMAC_RXC_SHORT(val) bfin_write32(EMAC_RXC_SHORT,val)
148#define bfin_read_EMAC_RXC_EQ64() bfin_read32(EMAC_RXC_EQ64) 146#define bfin_read_EMAC_RXC_EQ64() bfin_read32(EMAC_RXC_EQ64)
149#define bfin_write_EMAC_RXC_EQ64(val) bfin_write32(EMAC_RXC_EQ64,val) 147#define bfin_write_EMAC_RXC_EQ64(val) bfin_write32(EMAC_RXC_EQ64,val)
150#define pEMAC_RXC_LT128 ((volatile unsigned long *)EMAC_RXC_LT128)
151#define bfin_read_EMAC_RXC_LT128() bfin_read32(EMAC_RXC_LT128) 148#define bfin_read_EMAC_RXC_LT128() bfin_read32(EMAC_RXC_LT128)
152#define bfin_write_EMAC_RXC_LT128(val) bfin_write32(EMAC_RXC_LT128,val) 149#define bfin_write_EMAC_RXC_LT128(val) bfin_write32(EMAC_RXC_LT128,val)
153#define bfin_read_EMAC_RXC_LT256() bfin_read32(EMAC_RXC_LT256) 150#define bfin_read_EMAC_RXC_LT256() bfin_read32(EMAC_RXC_LT256)