diff options
author | Mike Frysinger <michael.frysinger@analog.com> | 2007-05-21 06:09:24 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-21 12:50:22 -0400 |
commit | 95e493c00ac0d2371c3f627fdb99d776d29a8166 (patch) | |
tree | 285b194c0dd0243338dc6ff9b21e2d92c807b82b /include/asm-blackfin/mach-bf537/cdefBF534.h | |
parent | 30870b93cd76bdfa7385f8d471345f5f6269fb00 (diff) |
Blackfin arch: finish removing p* volatile defines for MMRs
Signed-off-by: Mike Frysinger <michael.frysinger@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf537/cdefBF534.h')
-rw-r--r-- | include/asm-blackfin/mach-bf537/cdefBF534.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/include/asm-blackfin/mach-bf537/cdefBF534.h b/include/asm-blackfin/mach-bf537/cdefBF534.h index 9a167f3b224e..d4d3663c1100 100644 --- a/include/asm-blackfin/mach-bf537/cdefBF534.h +++ b/include/asm-blackfin/mach-bf537/cdefBF534.h | |||
@@ -75,7 +75,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
75 | #define bfin_write_SWRST(val) bfin_write16(SWRST,val) | 75 | #define bfin_write_SWRST(val) bfin_write16(SWRST,val) |
76 | #define bfin_read_SYSCR() bfin_read16(SYSCR) | 76 | #define bfin_read_SYSCR() bfin_read16(SYSCR) |
77 | #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) | 77 | #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val) |
78 | #define pSIC_RVECT ((void * volatile *)SIC_RVECT) | ||
79 | #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT) | 78 | #define bfin_read_SIC_RVECT() bfin_read32(SIC_RVECT) |
80 | #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val) | 79 | #define bfin_write_SIC_RVECT(val) bfin_write32(SIC_RVECT,val) |
81 | #define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK) | 80 | #define bfin_read_SIC_IMASK() bfin_read32(SIC_IMASK) |
@@ -400,10 +399,8 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) | |||
400 | #define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val) | 399 | #define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val) |
401 | 400 | ||
402 | /* DMA Traffic Control Registers */ | 401 | /* DMA Traffic Control Registers */ |
403 | #define pDMA_TCPER ((volatile unsigned short *)DMA_TCPER) | ||
404 | #define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER) | 402 | #define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER) |
405 | #define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val) | 403 | #define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val) |
406 | #define pDMA_TCCNT ((volatile unsigned short *)DMA_TCCNT) | ||
407 | #define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT) | 404 | #define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT) |
408 | #define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val) | 405 | #define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val) |
409 | 406 | ||