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authorBryan Wu <bryan.wu@analog.com>2007-10-10 12:30:56 -0400
committerBryan Wu <bryan.wu@analog.com>2007-10-10 12:30:56 -0400
commit1d487f468de75b8a5c664db60e106935f9dc753b (patch)
tree4b610ba2550b997893250ace494e94cc07f66e5d /include/asm-blackfin/mach-bf533
parentb7b2d344e7f7027497547a8b786a407047ee5e26 (diff)
Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf533')
-rw-r--r--include/asm-blackfin/mach-bf533/defBF532.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h
index 81b4af17c6a3..37134aaf9954 100644
--- a/include/asm-blackfin/mach-bf533/defBF532.h
+++ b/include/asm-blackfin/mach-bf533/defBF532.h
@@ -104,6 +104,7 @@
104#define UART_GCTL 0xFFC00424 /* Global Control Register */ 104#define UART_GCTL 0xFFC00424 /* Global Control Register */
105 105
106/* SPI Controller (0xFFC00500 - 0xFFC005FF) */ 106/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
107#define SPI0_REGBASE 0xFFC00500
107#define SPI_CTL 0xFFC00500 /* SPI Control Register */ 108#define SPI_CTL 0xFFC00500 /* SPI Control Register */
108#define SPI_FLG 0xFFC00504 /* SPI Flag register */ 109#define SPI_FLG 0xFFC00504 /* SPI Flag register */
109#define SPI_STAT 0xFFC00508 /* SPI Status register */ 110#define SPI_STAT 0xFFC00508 /* SPI Status register */