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authorGraf Yang <graf.yang@analog.com>2008-04-24 15:09:15 -0400
committerBryan Wu <cooloney@kernel.org>2008-04-24 15:09:15 -0400
commit5be36d22b28f01e5074f78b29aa6128da0a53641 (patch)
tree1fda8bcb0680eda6a826fc3753ee8c9f52a2c75b /include/asm-blackfin/mach-bf533/blackfin.h
parent37b6972ad8fb08d438fd600888aff212b1b193b0 (diff)
[Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
- add platform device resources in board files - add new bfin_sir.h to each machines Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf533/blackfin.h')
-rw-r--r--include/asm-blackfin/mach-bf533/blackfin.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf533/blackfin.h b/include/asm-blackfin/mach-bf533/blackfin.h
index f3b240abf170..d80971b4e3aa 100644
--- a/include/asm-blackfin/mach-bf533/blackfin.h
+++ b/include/asm-blackfin/mach-bf533/blackfin.h
@@ -42,4 +42,19 @@
42#include "cdefBF532.h" 42#include "cdefBF532.h"
43#endif 43#endif
44 44
45#define BFIN_UART_NR_PORTS 1
46
47#define OFFSET_THR 0x00 /* Transmit Holding register */
48#define OFFSET_RBR 0x00 /* Receive Buffer register */
49#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
50#define OFFSET_IER 0x04 /* Interrupt Enable Register */
51#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
52#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
53#define OFFSET_LCR 0x0C /* Line Control Register */
54#define OFFSET_MCR 0x10 /* Modem Control Register */
55#define OFFSET_LSR 0x14 /* Line Status Register */
56#define OFFSET_MSR 0x18 /* Modem Status Register */
57#define OFFSET_SCR 0x1C /* SCR Scratch Register */
58#define OFFSET_GCTL 0x24 /* Global Control Register */
59
45#endif /* _MACH_BLACKFIN_H_ */ 60#endif /* _MACH_BLACKFIN_H_ */