aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-blackfin/mach-bf527
diff options
context:
space:
mode:
authorGraf Yang <graf.yang@analog.com>2008-04-24 15:09:15 -0400
committerBryan Wu <cooloney@kernel.org>2008-04-24 15:09:15 -0400
commit5be36d22b28f01e5074f78b29aa6128da0a53641 (patch)
tree1fda8bcb0680eda6a826fc3753ee8c9f52a2c75b /include/asm-blackfin/mach-bf527
parent37b6972ad8fb08d438fd600888aff212b1b193b0 (diff)
[Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
- add platform device resources in board files - add new bfin_sir.h to each machines Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'include/asm-blackfin/mach-bf527')
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_serial_5xx.h48
-rw-r--r--include/asm-blackfin/mach-bf527/bfin_sir.h133
-rw-r--r--include/asm-blackfin/mach-bf527/blackfin.h15
3 files changed, 180 insertions, 16 deletions
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index c0694ecd2ecd..f0ab2736a680 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver head file
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 2
6
7#define OFFSET_THR 0x00 /* Transmit Holding register */
8#define OFFSET_RBR 0x00 /* Receive Buffer register */
9#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
10#define OFFSET_IER 0x04 /* Interrupt Enable Register */
11#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
12#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
13#define OFFSET_LCR 0x0C /* Line Control Register */
14#define OFFSET_MCR 0x10 /* Modem Control Register */
15#define OFFSET_LSR 0x14 /* Line Status Register */
16#define OFFSET_MSR 0x18 /* Modem Status Register */
17#define OFFSET_SCR 0x1C /* SCR Scratch Register */
18#define OFFSET_GCTL 0x24 /* Global Control Register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) 38#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
@@ -92,7 +108,7 @@ static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart)
92 bfin_write16(uart->port.membase + OFFSET_LSR, -1); 108 bfin_write16(uart->port.membase + OFFSET_LSR, -1);
93} 109}
94 110
95struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 111struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
96struct bfin_serial_res { 112struct bfin_serial_res {
97 unsigned long uart_base_addr; 113 unsigned long uart_base_addr;
98 int uart_irq; 114 int uart_irq;
diff --git a/include/asm-blackfin/mach-bf527/bfin_sir.h b/include/asm-blackfin/mach-bf527/bfin_sir.h
new file mode 100644
index 000000000000..0612d0c9501c
--- /dev/null
+++ b/include/asm-blackfin/mach-bf527/bfin_sir.h
@@ -0,0 +1,133 @@
1/*
2 * Blackfin Infra-red Driver
3 *
4 * Copyright 2006-2008 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 *
10 */
11
12#include <linux/serial.h>
13#include <asm/dma.h>
14#include <asm/portmux.h>
15
16#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
17#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
18#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
19#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
20#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
21#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
22#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
23
24#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
25#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
26#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
27#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
28#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
29#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
30
31#ifdef CONFIG_SIR_BFIN_DMA
32struct dma_rx_buf {
33 char *buf;
34 int head;
35 int tail;
36 };
37#endif /* CONFIG_SIR_BFIN_DMA */
38
39struct bfin_sir_port {
40 unsigned char __iomem *membase;
41 unsigned int irq;
42 unsigned int lsr;
43 unsigned long clk;
44 struct net_device *dev;
45#ifdef CONFIG_SIR_BFIN_DMA
46 int tx_done;
47 struct dma_rx_buf rx_dma_buf;
48 struct timer_list rx_dma_timer;
49 int rx_dma_nrows;
50#endif /* CONFIG_SIR_BFIN_DMA */
51 unsigned int tx_dma_channel;
52 unsigned int rx_dma_channel;
53};
54
55struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
56
57struct bfin_sir_port_res {
58 unsigned long base_addr;
59 int irq;
60 unsigned int rx_dma_channel;
61 unsigned int tx_dma_channel;
62};
63
64struct bfin_sir_port_res bfin_sir_port_resource[] = {
65#ifdef CONFIG_BFIN_SIR0
66 {
67 0xFFC00400,
68 IRQ_UART0_RX,
69 CH_UART0_RX,
70 CH_UART0_TX,
71 },
72#endif
73#ifdef CONFIG_BFIN_SIR1
74 {
75 0xFFC02000,
76 IRQ_UART1_RX,
77 CH_UART1_RX,
78 CH_UART1_TX,
79 },
80#endif
81};
82
83int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
84
85struct bfin_sir_self {
86 struct bfin_sir_port *sir_port;
87 spinlock_t lock;
88 unsigned int open;
89 int speed;
90 int newspeed;
91
92 struct sk_buff *txskb;
93 struct sk_buff *rxskb;
94 struct net_device_stats stats;
95 struct device *dev;
96 struct irlap_cb *irlap;
97 struct qos_info qos;
98
99 iobuff_t tx_buff;
100 iobuff_t rx_buff;
101
102 struct work_struct work;
103 int mtt;
104};
105
106static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
107{
108 unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
109 port->lsr |= (lsr & (BI|FE|PE|OE));
110 return lsr | port->lsr;
111}
112
113static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
114{
115 port->lsr = 0;
116 bfin_read16(port->membase + OFFSET_LSR);
117}
118
119#define DRIVER_NAME "bfin_sir"
120
121static void bfin_sir_hw_init(void)
122{
123#ifdef CONFIG_BFIN_SIR0
124 peripheral_request(P_UART0_TX, DRIVER_NAME);
125 peripheral_request(P_UART0_RX, DRIVER_NAME);
126#endif
127
128#ifdef CONFIG_BFIN_SIR1
129 peripheral_request(P_UART1_TX, DRIVER_NAME);
130 peripheral_request(P_UART1_RX, DRIVER_NAME);
131#endif
132 SSYNC();
133}
diff --git a/include/asm-blackfin/mach-bf527/blackfin.h b/include/asm-blackfin/mach-bf527/blackfin.h
index 1bd07e30781c..2891727b6176 100644
--- a/include/asm-blackfin/mach-bf527/blackfin.h
+++ b/include/asm-blackfin/mach-bf527/blackfin.h
@@ -64,6 +64,21 @@
64#define STATUS_P1 0x02 64#define STATUS_P1 0x02
65#define STATUS_P0 0x01 65#define STATUS_P0 0x01
66 66
67#define BFIN_UART_NR_PORTS 2
68
69#define OFFSET_THR 0x00 /* Transmit Holding register */
70#define OFFSET_RBR 0x00 /* Receive Buffer register */
71#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
72#define OFFSET_IER 0x04 /* Interrupt Enable Register */
73#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
74#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
75#define OFFSET_LCR 0x0C /* Line Control Register */
76#define OFFSET_MCR 0x10 /* Modem Control Register */
77#define OFFSET_LSR 0x14 /* Line Status Register */
78#define OFFSET_MSR 0x18 /* Modem Status Register */
79#define OFFSET_SCR 0x1C /* SCR Scratch Register */
80#define OFFSET_GCTL 0x24 /* Global Control Register */
81
67/* DPMC*/ 82/* DPMC*/
68#define bfin_read_STOPCK_OFF() bfin_read_STOPCK() 83#define bfin_read_STOPCK_OFF() bfin_read_STOPCK()
69#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val) 84#define bfin_write_STOPCK_OFF(val) bfin_write_STOPCK(val)