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authorBryan Wu <bryan.wu@analog.com>2007-10-10 12:30:56 -0400
committerBryan Wu <bryan.wu@analog.com>2007-10-10 12:30:56 -0400
commit1d487f468de75b8a5c664db60e106935f9dc753b (patch)
tree4b610ba2550b997893250ace494e94cc07f66e5d /include/asm-blackfin/mach-bf527/defBF52x_base.h
parentb7b2d344e7f7027497547a8b786a407047ee5e26 (diff)
Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header files, use the new REGBASE for board platform resources
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'include/asm-blackfin/mach-bf527/defBF52x_base.h')
-rw-r--r--include/asm-blackfin/mach-bf527/defBF52x_base.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf527/defBF52x_base.h b/include/asm-blackfin/mach-bf527/defBF52x_base.h
index 0b2fb5036ed0..b1ff67db01f8 100644
--- a/include/asm-blackfin/mach-bf527/defBF52x_base.h
+++ b/include/asm-blackfin/mach-bf527/defBF52x_base.h
@@ -102,6 +102,7 @@
102 102
103 103
104/* SPI Controller (0xFFC00500 - 0xFFC005FF) */ 104/* SPI Controller (0xFFC00500 - 0xFFC005FF) */
105#define SPI0_REGBASE 0xFFC00500
105#define SPI_CTL 0xFFC00500 /* SPI Control Register */ 106#define SPI_CTL 0xFFC00500 /* SPI Control Register */
106#define SPI_FLG 0xFFC00504 /* SPI Flag register */ 107#define SPI_FLG 0xFFC00504 /* SPI Flag register */
107#define SPI_STAT 0xFFC00508 /* SPI Status register */ 108#define SPI_STAT 0xFFC00508 /* SPI Status register */
@@ -480,6 +481,7 @@
480 481
481 482
482/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */ 483/* Two-Wire Interface (0xFFC01400 - 0xFFC014FF) */
484#define TWI0_REGBASE 0xFFC01400
483#define TWI_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */ 485#define TWI_CLKDIV 0xFFC01400 /* Serial Clock Divider Register */
484#define TWI_CONTROL 0xFFC01404 /* TWI Control Register */ 486#define TWI_CONTROL 0xFFC01404 /* TWI Control Register */
485#define TWI_SLAVE_CTL 0xFFC01408 /* Slave Mode Control Register */ 487#define TWI_SLAVE_CTL 0xFFC01408 /* Slave Mode Control Register */