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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-07-26 18:04:59 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-26 18:04:59 -0400
commitd9ecdb282c91952796b7542c4f57fd6de6948d7b (patch)
treefd4de7923968afa7d2981fb037e2255fc2cfa1e1 /include/asm-blackfin/mach-bf527/anomaly.h
parent4ef584ba84125b67c17b5aded38e7783cd8cdef0 (diff)
parent1d1f8b377c48e5aeddaea52eba74cc0539f088cd (diff)
Merge branch 'for_rmk_13' of git://git.mnementh.co.uk/linux-2.6-im
Diffstat (limited to 'include/asm-blackfin/mach-bf527/anomaly.h')
-rw-r--r--include/asm-blackfin/mach-bf527/anomaly.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h
index 4725268a5ada..b7b166f4f064 100644
--- a/include/asm-blackfin/mach-bf527/anomaly.h
+++ b/include/asm-blackfin/mach-bf527/anomaly.h
@@ -23,6 +23,8 @@
23#define ANOMALY_05000245 (1) 23#define ANOMALY_05000245 (1)
24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ 24/* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */
25#define ANOMALY_05000265 (1) 25#define ANOMALY_05000265 (1)
26/* New Feature: EMAC TX DMA Word Alignment */
27#define ANOMALY_05000285 (1)
26/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ 28/* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */
27#define ANOMALY_05000312 (1) 29#define ANOMALY_05000312 (1)
28/* Incorrect Access of OTP_STATUS During otp_write() Function */ 30/* Incorrect Access of OTP_STATUS During otp_write() Function */