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authorBryan Wu <bryan.wu@analog.com>2007-05-06 17:50:22 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-07 15:12:58 -0400
commit1394f03221790a988afc3e4b3cb79f2e477246a9 (patch)
tree2c1963c9a4f2d84a5e021307fde240c5d567cf70 /include/asm-blackfin/gpio.h
parent73243284463a761e04d69d22c7516b2be7de096c (diff)
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-blackfin/gpio.h')
-rw-r--r--include/asm-blackfin/gpio.h367
1 files changed, 367 insertions, 0 deletions
diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h
new file mode 100644
index 000000000000..d16fe3cd6135
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+++ b/include/asm-blackfin/gpio.h
@@ -0,0 +1,367 @@
1/*
2 * File: arch/blackfin/kernel/bfin_gpio.h
3 * Based on:
4 * Author: Michael Hennerich (hennerich@blackfin.uclinux.org)
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30/*
31* Number BF537/6/4 BF561 BF533/2/1
32*
33* GPIO_0 PF0 PF0 PF0
34* GPIO_1 PF1 PF1 PF1
35* GPIO_2 PF2 PF2 PF2
36* GPIO_3 PF3 PF3 PF3
37* GPIO_4 PF4 PF4 PF4
38* GPIO_5 PF5 PF5 PF5
39* GPIO_6 PF6 PF6 PF6
40* GPIO_7 PF7 PF7 PF7
41* GPIO_8 PF8 PF8 PF8
42* GPIO_9 PF9 PF9 PF9
43* GPIO_10 PF10 PF10 PF10
44* GPIO_11 PF11 PF11 PF11
45* GPIO_12 PF12 PF12 PF12
46* GPIO_13 PF13 PF13 PF13
47* GPIO_14 PF14 PF14 PF14
48* GPIO_15 PF15 PF15 PF15
49* GPIO_16 PG0 PF16
50* GPIO_17 PG1 PF17
51* GPIO_18 PG2 PF18
52* GPIO_19 PG3 PF19
53* GPIO_20 PG4 PF20
54* GPIO_21 PG5 PF21
55* GPIO_22 PG6 PF22
56* GPIO_23 PG7 PF23
57* GPIO_24 PG8 PF24
58* GPIO_25 PG9 PF25
59* GPIO_26 PG10 PF26
60* GPIO_27 PG11 PF27
61* GPIO_28 PG12 PF28
62* GPIO_29 PG13 PF29
63* GPIO_30 PG14 PF30
64* GPIO_31 PG15 PF31
65* GPIO_32 PH0 PF32
66* GPIO_33 PH1 PF33
67* GPIO_34 PH2 PF34
68* GPIO_35 PH3 PF35
69* GPIO_36 PH4 PF36
70* GPIO_37 PH5 PF37
71* GPIO_38 PH6 PF38
72* GPIO_39 PH7 PF39
73* GPIO_40 PH8 PF40
74* GPIO_41 PH9 PF41
75* GPIO_42 PH10 PF42
76* GPIO_43 PH11 PF43
77* GPIO_44 PH12 PF44
78* GPIO_45 PH13 PF45
79* GPIO_46 PH14 PF46
80* GPIO_47 PH15 PF47
81*/
82
83#ifndef __ARCH_BLACKFIN_GPIO_H__
84#define __ARCH_BLACKFIN_GPIO_H__
85
86#define gpio_bank(x) ((x) >> 4)
87#define gpio_bit(x) (1<<((x) & 0xF))
88#define gpio_sub_n(x) ((x) & 0xF)
89
90#define GPIO_BANKSIZE 16
91
92#define GPIO_0 0
93#define GPIO_1 1
94#define GPIO_2 2
95#define GPIO_3 3
96#define GPIO_4 4
97#define GPIO_5 5
98#define GPIO_6 6
99#define GPIO_7 7
100#define GPIO_8 8
101#define GPIO_9 9
102#define GPIO_10 10
103#define GPIO_11 11
104#define GPIO_12 12
105#define GPIO_13 13
106#define GPIO_14 14
107#define GPIO_15 15
108#define GPIO_16 16
109#define GPIO_17 17
110#define GPIO_18 18
111#define GPIO_19 19
112#define GPIO_20 20
113#define GPIO_21 21
114#define GPIO_22 22
115#define GPIO_23 23
116#define GPIO_24 24
117#define GPIO_25 25
118#define GPIO_26 26
119#define GPIO_27 27
120#define GPIO_28 28
121#define GPIO_29 29
122#define GPIO_30 30
123#define GPIO_31 31
124#define GPIO_32 32
125#define GPIO_33 33
126#define GPIO_34 34
127#define GPIO_35 35
128#define GPIO_36 36
129#define GPIO_37 37
130#define GPIO_38 38
131#define GPIO_39 39
132#define GPIO_40 40
133#define GPIO_41 41
134#define GPIO_42 42
135#define GPIO_43 43
136#define GPIO_44 44
137#define GPIO_45 45
138#define GPIO_46 46
139#define GPIO_47 47
140
141
142#define PERIPHERAL_USAGE 1
143#define GPIO_USAGE 0
144
145#ifdef BF533_FAMILY
146#define MAX_BLACKFIN_GPIOS 16
147#endif
148
149#ifdef BF537_FAMILY
150#define MAX_BLACKFIN_GPIOS 48
151#define PORT_F 0
152#define PORT_G 1
153#define PORT_H 2
154#define PORT_J 3
155
156#define GPIO_PF0 0
157#define GPIO_PF1 1
158#define GPIO_PF2 2
159#define GPIO_PF3 3
160#define GPIO_PF4 4
161#define GPIO_PF5 5
162#define GPIO_PF6 6
163#define GPIO_PF7 7
164#define GPIO_PF8 8
165#define GPIO_PF9 9
166#define GPIO_PF10 10
167#define GPIO_PF11 11
168#define GPIO_PF12 12
169#define GPIO_PF13 13
170#define GPIO_PF14 14
171#define GPIO_PF15 15
172#define GPIO_PG0 16
173#define GPIO_PG1 17
174#define GPIO_PG2 18
175#define GPIO_PG3 19
176#define GPIO_PG4 20
177#define GPIO_PG5 21
178#define GPIO_PG6 22
179#define GPIO_PG7 23
180#define GPIO_PG8 24
181#define GPIO_PG9 25
182#define GPIO_PG10 26
183#define GPIO_PG11 27
184#define GPIO_PG12 28
185#define GPIO_PG13 29
186#define GPIO_PG14 30
187#define GPIO_PG15 31
188#define GPIO_PH0 32
189#define GPIO_PH1 33
190#define GPIO_PH2 34
191#define GPIO_PH3 35
192#define GPIO_PH4 36
193#define GPIO_PH5 37
194#define GPIO_PH6 38
195#define GPIO_PH7 39
196#define GPIO_PH8 40
197#define GPIO_PH9 41
198#define GPIO_PH10 42
199#define GPIO_PH11 43
200#define GPIO_PH12 44
201#define GPIO_PH13 45
202#define GPIO_PH14 46
203#define GPIO_PH15 47
204
205#endif
206
207#ifdef BF561_FAMILY
208#define MAX_BLACKFIN_GPIOS 48
209#define PORT_FIO0 0
210#define PORT_FIO1 1
211#define PORT_FIO2 2
212#endif
213
214#ifndef __ASSEMBLY__
215
216/***********************************************************
217*
218* FUNCTIONS: Blackfin General Purpose Ports Access Functions
219*
220* INPUTS/OUTPUTS:
221* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
222*
223*
224* DESCRIPTION: These functions abstract direct register access
225* to Blackfin processor General Purpose
226* Ports Regsiters
227*
228* CAUTION: These functions do not belong to the GPIO Driver API
229*************************************************************
230* MODIFICATION HISTORY :
231**************************************************************/
232
233void set_gpio_dir(unsigned short, unsigned short);
234void set_gpio_inen(unsigned short, unsigned short);
235void set_gpio_polar(unsigned short, unsigned short);
236void set_gpio_edge(unsigned short, unsigned short);
237void set_gpio_both(unsigned short, unsigned short);
238void set_gpio_data(unsigned short, unsigned short);
239void set_gpio_maska(unsigned short, unsigned short);
240void set_gpio_maskb(unsigned short, unsigned short);
241void set_gpio_toggle(unsigned short);
242void set_gpiop_dir(unsigned short, unsigned short);
243void set_gpiop_inen(unsigned short, unsigned short);
244void set_gpiop_polar(unsigned short, unsigned short);
245void set_gpiop_edge(unsigned short, unsigned short);
246void set_gpiop_both(unsigned short, unsigned short);
247void set_gpiop_data(unsigned short, unsigned short);
248void set_gpiop_maska(unsigned short, unsigned short);
249void set_gpiop_maskb(unsigned short, unsigned short);
250unsigned short get_gpio_dir(unsigned short);
251unsigned short get_gpio_inen(unsigned short);
252unsigned short get_gpio_polar(unsigned short);
253unsigned short get_gpio_edge(unsigned short);
254unsigned short get_gpio_both(unsigned short);
255unsigned short get_gpio_maska(unsigned short);
256unsigned short get_gpio_maskb(unsigned short);
257unsigned short get_gpio_data(unsigned short);
258unsigned short get_gpiop_dir(unsigned short);
259unsigned short get_gpiop_inen(unsigned short);
260unsigned short get_gpiop_polar(unsigned short);
261unsigned short get_gpiop_edge(unsigned short);
262unsigned short get_gpiop_both(unsigned short);
263unsigned short get_gpiop_maska(unsigned short);
264unsigned short get_gpiop_maskb(unsigned short);
265unsigned short get_gpiop_data(unsigned short);
266
267struct gpio_port_t {
268 unsigned short data;
269 unsigned short dummy1;
270 unsigned short data_clear;
271 unsigned short dummy2;
272 unsigned short data_set;
273 unsigned short dummy3;
274 unsigned short toggle;
275 unsigned short dummy4;
276 unsigned short maska;
277 unsigned short dummy5;
278 unsigned short maska_clear;
279 unsigned short dummy6;
280 unsigned short maska_set;
281 unsigned short dummy7;
282 unsigned short maska_toggle;
283 unsigned short dummy8;
284 unsigned short maskb;
285 unsigned short dummy9;
286 unsigned short maskb_clear;
287 unsigned short dummy10;
288 unsigned short maskb_set;
289 unsigned short dummy11;
290 unsigned short maskb_toggle;
291 unsigned short dummy12;
292 unsigned short dir;
293 unsigned short dummy13;
294 unsigned short polar;
295 unsigned short dummy14;
296 unsigned short edge;
297 unsigned short dummy15;
298 unsigned short both;
299 unsigned short dummy16;
300 unsigned short inen;
301};
302
303#ifdef CONFIG_PM
304#define PM_WAKE_RISING 0x1
305#define PM_WAKE_FALLING 0x2
306#define PM_WAKE_HIGH 0x4
307#define PM_WAKE_LOW 0x8
308#define PM_WAKE_BOTH_EDGES (PM_WAKE_RISING | PM_WAKE_FALLING)
309
310int gpio_pm_wakeup_request(unsigned short gpio, unsigned char type);
311void gpio_pm_wakeup_free(unsigned short gpio);
312unsigned int gpio_pm_setup(void);
313void gpio_pm_restore(void);
314
315struct gpio_port_s {
316 unsigned short data;
317 unsigned short data_clear;
318 unsigned short data_set;
319 unsigned short toggle;
320 unsigned short maska;
321 unsigned short maska_clear;
322 unsigned short maska_set;
323 unsigned short maska_toggle;
324 unsigned short maskb;
325 unsigned short maskb_clear;
326 unsigned short maskb_set;
327 unsigned short maskb_toggle;
328 unsigned short dir;
329 unsigned short polar;
330 unsigned short edge;
331 unsigned short both;
332 unsigned short inen;
333
334 unsigned short fer;
335};
336#endif /*CONFIG_PM*/
337
338/***********************************************************
339*
340* FUNCTIONS: Blackfin GPIO Driver
341*
342* INPUTS/OUTPUTS:
343* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
344*
345*
346* DESCRIPTION: Blackfin GPIO Driver API
347*
348* CAUTION:
349*************************************************************
350* MODIFICATION HISTORY :
351**************************************************************/
352
353int gpio_request(unsigned short, const char *);
354void gpio_free(unsigned short);
355
356void gpio_set_value(unsigned short gpio, unsigned short arg);
357unsigned short gpio_get_value(unsigned short gpio);
358
359#define gpio_get_value(gpio) get_gpio_data(gpio)
360#define gpio_set_value(gpio, value) set_gpio_data(gpio, value)
361
362void gpio_direction_input(unsigned short gpio);
363void gpio_direction_output(unsigned short gpio);
364
365#endif /* __ASSEMBLY__ */
366
367#endif /* __ARCH_BLACKFIN_GPIO_H__ */
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