Blackfin arch: Functional power management support

Enable: PM_SUSPEND_MEM -> Blackfin Hibernate to SDRAM
This feature requires a special bootloader (u-boot)
supporting return from hibernate.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>

1 files changed, 31 insertions, 51 deletions

diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h
index 7f34cd384f12..de28e6e018b3 100644
--- a/include/asm-blackfin/dpmc.h
+++ b/include/asm-blackfin/dpmc.h
@@ -7,63 +7,18 @@
 #ifndef _BLACKFIN_DPMC_H_
 #define _BLACKFIN_DPMC_H_
 
-#define SLEEP_MODE              1
-#define DEEP_SLEEP_MODE         2
-#define ACTIVE_PLL_DISABLED     3
-#define FULLON_MODE             4
-#define ACTIVE_PLL_ENABLED      5
-#define HIBERNATE_MODE          6
-
-#define IOCTL_FULL_ON_MODE      _IO('s', 0xA0)
-#define IOCTL_ACTIVE_MODE       _IO('s', 0xA1)
-#define IOCTL_SLEEP_MODE        _IO('s', 0xA2)
-#define IOCTL_DEEP_SLEEP_MODE   _IO('s', 0xA3)
-#define IOCTL_HIBERNATE_MODE    _IO('s', 0xA4)
-#define IOCTL_CHANGE_FREQUENCY  _IOW('s', 0xA5, unsigned long)
-#define IOCTL_CHANGE_VOLTAGE    _IOW('s', 0xA6, unsigned long)
-#define IOCTL_SET_CCLK          _IOW('s', 0xA7, unsigned long)
-#define IOCTL_SET_SCLK          _IOW('s', 0xA8, unsigned long)
-#define IOCTL_GET_PLLSTATUS     _IOW('s', 0xA9, unsigned long)
-#define IOCTL_GET_CORECLOCK     _IOW('s', 0xAA, unsigned long)
-#define IOCTL_GET_SYSTEMCLOCK   _IOW('s', 0xAB, unsigned long)
-#define IOCTL_GET_VCO           _IOW('s', 0xAC, unsigned long)
-#define IOCTL_DISABLE_WDOG_TIMER _IO('s', 0xAD)
-#define IOCTL_UNMASK_WDOG_WAKEUP_EVENT _IO('s',0xAE)
-#define IOCTL_PROGRAM_WDOG_TIMER _IOW('s',0xAF,unsigned long)
-#define IOCTL_CLEAR_WDOG_WAKEUP_EVENT _IO('s',0xB0)
-#define IOCTL_SLEEP_DEEPER_MODE _IO('s',0xB1)
-
-#define DPMC_MINOR              254
-
-#define ON      0
-#define OFF     1
-
 #ifdef __KERNEL__
+#ifndef __ASSEMBLY__
 
-unsigned long calc_volt(void);
-int calc_vlev(int vlt);
-unsigned long change_voltage(unsigned long volt);
-int calc_msel(int vco_hz);
-unsigned long change_frequency(unsigned long vco_mhz);
-int set_pll_div(unsigned short sel, unsigned char flag);
-int get_vco(void);
-unsigned long change_system_clock(unsigned long clock);
-unsigned long change_core_clock(unsigned long clock);
-unsigned long get_pll_status(void);
-void change_baud(int baud);
-void fullon_mode(void);
-void active_mode(void);
 void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
 void deep_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
 void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
 void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
-void program_wdog_timer(unsigned long);
-void unmask_wdog_wakeup_evt(void);
-void clear_wdog_wakeup_evt(void);
-void disable_wdog_timer(void);
+void do_hibernate(int wakeup);
+void set_dram_srfs(void);
+void unset_dram_srfs(void);
 
-extern unsigned long get_cclk(void);
-extern unsigned long get_sclk(void);
+#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
 
 struct bfin_dpmc_platform_data {
         const unsigned int *tuple_tab;
@@ -71,8 +26,33 @@ struct bfin_dpmc_platform_data {
         unsigned short vr_settling_time; /* in us */
 };
 
-#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
+#else
+
+#define PM_PUSH(x) \
+        R0 = [P0 + (x - SRAM_BASE_ADDRESS)];\
+        [--SP] =  R0;\
+
+#define PM_POP(x) \
+        R0 = [SP++];\
+        [P0 + (x - SRAM_BASE_ADDRESS)] = R0;\
+
+#define PM_SYS_PUSH(x) \
+        R0 = [P0 + (x - PLL_CTL)];\
+        [--SP] =  R0;\
+
+#define PM_SYS_POP(x) \
+        R0 = [SP++];\
+        [P0 + (x - PLL_CTL)] = R0;\
+
+#define PM_SYS_PUSH16(x) \
+        R0 = w[P0 + (x - PLL_CTL)];\
+        [--SP] =  R0;\
+
+#define PM_SYS_POP16(x) \
+        R0 = [SP++];\
+        w[P0 + (x - PLL_CTL)] = R0;\
 
+#endif
 #endif  /* __KERNEL__ */
 
 #endif  /*_BLACKFIN_DPMC_H_*/