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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2007-01-30 05:16:16 -0500
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2007-02-09 09:01:58 -0500
commit7f9f4678637f9ee1a999cc0870c4668f32e1a7eb (patch)
tree557c08cbc47b9936c3a8c2f550bb3acd8781332e /include/asm-avr32/arch-at32ap/at32ap7000.h
parente7f70b8cc69b1bcc56ed8d70f8e3671ec3956374 (diff)
[AVR32] Add PIOE device and reserve SDRAM pins
The PIOE device was left out before because it muxes SDRAM pins (and is therefore a bit dangerous to mess with) and because no existing drivers had any use for it. It is needed for CompactFlash, however, and now that we have a way to protect the SDRAM pins, it can be safely added. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include/asm-avr32/arch-at32ap/at32ap7000.h')
-rw-r--r--include/asm-avr32/arch-at32ap/at32ap7000.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h
index ba85e04553d4..3914d7b94ff4 100644
--- a/include/asm-avr32/arch-at32ap/at32ap7000.h
+++ b/include/asm-avr32/arch-at32ap/at32ap7000.h
@@ -24,10 +24,12 @@
24#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) 24#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32)
25#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) 25#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32)
26#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) 26#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32)
27#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32)
27 28
28#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) 29#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N))
29#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) 30#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N))
30#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) 31#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N))
31#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) 32#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N))
33#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N))
32 34
33#endif /* __ASM_ARCH_AT32AP7000_H__ */ 35#endif /* __ASM_ARCH_AT32AP7000_H__ */