diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-30 06:14:32 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-10-30 06:17:12 -0400 |
commit | 180ee700ddfcc882d90410d979a4b3a804380ed2 (patch) | |
tree | 2b23495de69ee956c0245f6f15e003ea57ee7779 /include/asm-arm | |
parent | e946217e4fdaa67681bbabfa8e6b18641921f750 (diff) |
[ARM] S3C: Move regs-watchdog.h to arch/arm/plat-s3c/include/plat
Move regs-watchdog.h to arch/arm/plat-s3c/include/plat ready
to clean out the old include directories
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/plat-s3c/regs-watchdog.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/include/asm-arm/plat-s3c/regs-watchdog.h b/include/asm-arm/plat-s3c/regs-watchdog.h deleted file mode 100644 index 4938492470f7..000000000000 --- a/include/asm-arm/plat-s3c/regs-watchdog.h +++ /dev/null | |||
@@ -1,41 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://www.simtec.co.uk/products/SWLINUX/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2410 Watchdog timer control | ||
11 | */ | ||
12 | |||
13 | |||
14 | #ifndef __ASM_ARCH_REGS_WATCHDOG_H | ||
15 | #define __ASM_ARCH_REGS_WATCHDOG_H | ||
16 | |||
17 | #define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG) | ||
18 | |||
19 | #define S3C2410_WTCON S3C_WDOGREG(0x00) | ||
20 | #define S3C2410_WTDAT S3C_WDOGREG(0x04) | ||
21 | #define S3C2410_WTCNT S3C_WDOGREG(0x08) | ||
22 | |||
23 | /* the watchdog can either generate a reset pulse, or an | ||
24 | * interrupt. | ||
25 | */ | ||
26 | |||
27 | #define S3C2410_WTCON_RSTEN (0x01) | ||
28 | #define S3C2410_WTCON_INTEN (1<<2) | ||
29 | #define S3C2410_WTCON_ENABLE (1<<5) | ||
30 | |||
31 | #define S3C2410_WTCON_DIV16 (0<<3) | ||
32 | #define S3C2410_WTCON_DIV32 (1<<3) | ||
33 | #define S3C2410_WTCON_DIV64 (2<<3) | ||
34 | #define S3C2410_WTCON_DIV128 (3<<3) | ||
35 | |||
36 | #define S3C2410_WTCON_PRESCALE(x) ((x) << 8) | ||
37 | #define S3C2410_WTCON_PRESCALE_MASK (0xff00) | ||
38 | |||
39 | #endif /* __ASM_ARCH_REGS_WATCHDOG_H */ | ||
40 | |||
41 | |||