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authorCatalin Marinas <catalin.marinas@arm.com>2006-04-10 16:32:42 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-10 16:32:42 -0400
commitbb54a335ae6d282a4f177c7b35cd149aa9b0b9be (patch)
tree66dc46a556ab5a11748a42a069b45aa32c4c126a /include/asm-arm
parent1320a80d1d2587545f39bc0d2dc3adaf390250ef (diff)
[ARM] 3472/1: Use the D variants of FLDMIA/FSTMIA on ARMv6
Patch from Catalin Marinas The X variants are deprecated starting with ARMv6. Using the D variants, the fpmx_state in vfp_hard_struct is no longer needed. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/fpstate.h2
-rw-r--r--include/asm-arm/vfpmacros.h8
2 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h
index 6246bf83627d..52bae088a185 100644
--- a/include/asm-arm/fpstate.h
+++ b/include/asm-arm/fpstate.h
@@ -26,7 +26,9 @@
26 26
27struct vfp_hard_struct { 27struct vfp_hard_struct {
28 __u64 fpregs[16]; 28 __u64 fpregs[16];
29#if __LINUX_ARM_ARCH__ < 6
29 __u32 fpmx_state; 30 __u32 fpmx_state;
31#endif
30 __u32 fpexc; 32 __u32 fpexc;
31 __u32 fpscr; 33 __u32 fpscr;
32 /* 34 /*
diff --git a/include/asm-arm/vfpmacros.h b/include/asm-arm/vfpmacros.h
index 15bd6e74c9cf..27fe028b4e72 100644
--- a/include/asm-arm/vfpmacros.h
+++ b/include/asm-arm/vfpmacros.h
@@ -16,10 +16,18 @@
16 16
17 @ read all the working registers back into the VFP 17 @ read all the working registers back into the VFP
18 .macro VFPFLDMIA, base 18 .macro VFPFLDMIA, base
19#if __LINUX_ARM_ARCH__ < 6
19 LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} 20 LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
21#else
22 LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
23#endif
20 .endm 24 .endm
21 25
22 @ write all the working registers out of the VFP 26 @ write all the working registers out of the VFP
23 .macro VFPFSTMIA, base 27 .macro VFPFSTMIA, base
28#if __LINUX_ARM_ARCH__ < 6
24 STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} 29 STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
30#else
31 STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
32#endif
25 .endm 33 .endm