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authorLinus Torvalds <torvalds@linux-foundation.org>2008-07-16 18:11:07 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-16 18:17:52 -0400
commit8a0ca91e1db5de5eb5b18cfa919d52ff8be375af (patch)
treebd3a1564940d27ae7f6229089db1283ff2a636c8 /include/asm-arm
parent9c1be0c4712fe760d8969427ef91107e9c062d91 (diff)
parentc43d8636971c39da993e94082fd65bfff421618e (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (68 commits) sdio_uart: Fix SDIO break control to now return success or an error mmc: host driver for Ricoh Bay1Controllers sdio: sdio_io.c Fix sparse warnings sdio: fix the use of hard coded timeout value. mmc: OLPC: update vdd/powerup quirk comment mmc: fix spares errors of sdhci.c mmc: remove multiwrite capability wbsd: fix bad dma_addr_t conversion atmel-mci: Driver for Atmel on-chip MMC controllers mmc: fix sdio_io sparse errors mmc: wbsd.c fix shadowing of 'dma' variable MMC: S3C24XX: Refuse incorrectly aligned transfers MMC: S3C24XX: Add maintainer entry MMC: S3C24XX: Update error debugging. MMC: S3C24XX: Add media presence test to request handling. MMC: S3C24XX: Fix use of msecs where jiffies are needed MMC: S3C24XX: Add MODULE_ALIAS() entries for the platform devices MMC: S3C24XX: Fix s3c2410_dma_request() return code check. MMC: S3C24XX: Allow card-detect on non-IRQ capable pin MMC: S3C24XX: Ensure host->mrq->data is valid ... Manually fixed up bogus executable bits on drivers/mmc/core/sdio_io.c and include/linux/mmc/sdio_func.h when merging.
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-at91/at91_mci.h4
-rw-r--r--include/asm-arm/arch-s3c2410/regs-sdi.h20
-rw-r--r--include/asm-arm/plat-s3c24xx/mci.h15
3 files changed, 36 insertions, 3 deletions
diff --git a/include/asm-arm/arch-at91/at91_mci.h b/include/asm-arm/arch-at91/at91_mci.h
index 1551fc24eb43..400ec10014b4 100644
--- a/include/asm-arm/arch-at91/at91_mci.h
+++ b/include/asm-arm/arch-at91/at91_mci.h
@@ -75,6 +75,10 @@
75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) 75#define AT91_MCI_TRTYP_MULTIPLE (1 << 19)
76#define AT91_MCI_TRTYP_STREAM (2 << 19) 76#define AT91_MCI_TRTYP_STREAM (2 << 19)
77 77
78#define AT91_MCI_BLKR 0x18 /* Block Register */
79#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */
80#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */
81
78#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ 82#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */
79#define AT91_MCR_RDR 0x30 /* Receive Data Register */ 83#define AT91_MCR_RDR 0x30 /* Receive Data Register */
80#define AT91_MCR_TDR 0x34 /* Transmit Data Register */ 84#define AT91_MCR_TDR 0x34 /* Transmit Data Register */
diff --git a/include/asm-arm/arch-s3c2410/regs-sdi.h b/include/asm-arm/arch-s3c2410/regs-sdi.h
index bb9d30b72952..bfb222fa4abb 100644
--- a/include/asm-arm/arch-s3c2410/regs-sdi.h
+++ b/include/asm-arm/arch-s3c2410/regs-sdi.h
@@ -28,9 +28,15 @@
28#define S3C2410_SDIDCNT (0x30) 28#define S3C2410_SDIDCNT (0x30)
29#define S3C2410_SDIDSTA (0x34) 29#define S3C2410_SDIDSTA (0x34)
30#define S3C2410_SDIFSTA (0x38) 30#define S3C2410_SDIFSTA (0x38)
31
31#define S3C2410_SDIDATA (0x3C) 32#define S3C2410_SDIDATA (0x3C)
32#define S3C2410_SDIIMSK (0x40) 33#define S3C2410_SDIIMSK (0x40)
33 34
35#define S3C2440_SDIDATA (0x40)
36#define S3C2440_SDIIMSK (0x3C)
37
38#define S3C2440_SDICON_SDRESET (1<<8)
39#define S3C2440_SDICON_MMCCLOCK (1<<5)
34#define S3C2410_SDICON_BYTEORDER (1<<4) 40#define S3C2410_SDICON_BYTEORDER (1<<4)
35#define S3C2410_SDICON_SDIOIRQ (1<<3) 41#define S3C2410_SDICON_SDIOIRQ (1<<3)
36#define S3C2410_SDICON_RWAITEN (1<<2) 42#define S3C2410_SDICON_RWAITEN (1<<2)
@@ -42,7 +48,8 @@
42#define S3C2410_SDICMDCON_LONGRSP (1<<10) 48#define S3C2410_SDICMDCON_LONGRSP (1<<10)
43#define S3C2410_SDICMDCON_WAITRSP (1<<9) 49#define S3C2410_SDICMDCON_WAITRSP (1<<9)
44#define S3C2410_SDICMDCON_CMDSTART (1<<8) 50#define S3C2410_SDICMDCON_CMDSTART (1<<8)
45#define S3C2410_SDICMDCON_INDEX (0xff) 51#define S3C2410_SDICMDCON_SENDERHOST (1<<6)
52#define S3C2410_SDICMDCON_INDEX (0x3f)
46 53
47#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12) 54#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12)
48#define S3C2410_SDICMDSTAT_CMDSENT (1<<11) 55#define S3C2410_SDICMDSTAT_CMDSENT (1<<11)
@@ -51,6 +58,9 @@
51#define S3C2410_SDICMDSTAT_XFERING (1<<8) 58#define S3C2410_SDICMDSTAT_XFERING (1<<8)
52#define S3C2410_SDICMDSTAT_INDEX (0xff) 59#define S3C2410_SDICMDSTAT_INDEX (0xff)
53 60
61#define S3C2440_SDIDCON_DS_BYTE (0<<22)
62#define S3C2440_SDIDCON_DS_HALFWORD (1<<22)
63#define S3C2440_SDIDCON_DS_WORD (2<<22)
54#define S3C2410_SDIDCON_IRQPERIOD (1<<21) 64#define S3C2410_SDIDCON_IRQPERIOD (1<<21)
55#define S3C2410_SDIDCON_TXAFTERRESP (1<<20) 65#define S3C2410_SDIDCON_TXAFTERRESP (1<<20)
56#define S3C2410_SDIDCON_RXAFTERCMD (1<<19) 66#define S3C2410_SDIDCON_RXAFTERCMD (1<<19)
@@ -59,6 +69,7 @@
59#define S3C2410_SDIDCON_WIDEBUS (1<<16) 69#define S3C2410_SDIDCON_WIDEBUS (1<<16)
60#define S3C2410_SDIDCON_DMAEN (1<<15) 70#define S3C2410_SDIDCON_DMAEN (1<<15)
61#define S3C2410_SDIDCON_STOP (1<<14) 71#define S3C2410_SDIDCON_STOP (1<<14)
72#define S3C2440_SDIDCON_DATSTART (1<<14)
62#define S3C2410_SDIDCON_DATMODE (3<<12) 73#define S3C2410_SDIDCON_DATMODE (3<<12)
63#define S3C2410_SDIDCON_BLKNUM (0x7ff) 74#define S3C2410_SDIDCON_BLKNUM (0x7ff)
64 75
@@ -68,6 +79,7 @@
68#define S3C2410_SDIDCON_XFER_RXSTART (2<<12) 79#define S3C2410_SDIDCON_XFER_RXSTART (2<<12)
69#define S3C2410_SDIDCON_XFER_TXSTART (3<<12) 80#define S3C2410_SDIDCON_XFER_TXSTART (3<<12)
70 81
82#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF)
71#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12) 83#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12)
72 84
73#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10) 85#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10)
@@ -82,10 +94,12 @@
82#define S3C2410_SDIDSTA_TXDATAON (1<<1) 94#define S3C2410_SDIDSTA_TXDATAON (1<<1)
83#define S3C2410_SDIDSTA_RXDATAON (1<<0) 95#define S3C2410_SDIDSTA_RXDATAON (1<<0)
84 96
97#define S3C2440_SDIFSTA_FIFORESET (1<<16)
98#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */
85#define S3C2410_SDIFSTA_TFDET (1<<13) 99#define S3C2410_SDIFSTA_TFDET (1<<13)
86#define S3C2410_SDIFSTA_RFDET (1<<12) 100#define S3C2410_SDIFSTA_RFDET (1<<12)
87#define S3C2410_SDIFSTA_TXHALF (1<<11) 101#define S3C2410_SDIFSTA_TFHALF (1<<11)
88#define S3C2410_SDIFSTA_TXEMPTY (1<<10) 102#define S3C2410_SDIFSTA_TFEMPTY (1<<10)
89#define S3C2410_SDIFSTA_RFLAST (1<<9) 103#define S3C2410_SDIFSTA_RFLAST (1<<9)
90#define S3C2410_SDIFSTA_RFFULL (1<<8) 104#define S3C2410_SDIFSTA_RFFULL (1<<8)
91#define S3C2410_SDIFSTA_RFHALF (1<<7) 105#define S3C2410_SDIFSTA_RFHALF (1<<7)
diff --git a/include/asm-arm/plat-s3c24xx/mci.h b/include/asm-arm/plat-s3c24xx/mci.h
new file mode 100644
index 000000000000..2d0852ac3b27
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/mci.h
@@ -0,0 +1,15 @@
1#ifndef _ARCH_MCI_H
2#define _ARCH_MCI_H
3
4struct s3c24xx_mci_pdata {
5 unsigned int wprotect_invert : 1;
6 unsigned int detect_invert : 1; /* set => detect active high. */
7
8 unsigned int gpio_detect;
9 unsigned int gpio_wprotect;
10 unsigned long ocr_avail;
11 void (*set_power)(unsigned char power_mode,
12 unsigned short vdd);
13};
14
15#endif /* _ARCH_NCI_H */