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authorHyok S. Choi <hyok.choi@samsung.com>2006-09-26 04:36:37 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-27 12:34:30 -0400
commitf12d0d7c7786af39435ef6ae9defe47fb58f6091 (patch)
tree03361f2b925754f2acf4f311df2122f844d3d4fe /include/asm-arm
parentfefdaa06ccdde394be865ed76509be82813e425b (diff)
[ARM] nommu: manage the CP15 things
All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/system.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index c19c5b009f71..f05fbe31576c 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -46,6 +46,7 @@
46#define CPUID_TCM 2 46#define CPUID_TCM 2
47#define CPUID_TLBTYPE 3 47#define CPUID_TLBTYPE 3
48 48
49#ifdef CONFIG_CPU_CP15
49#define read_cpuid(reg) \ 50#define read_cpuid(reg) \
50 ({ \ 51 ({ \
51 unsigned int __val; \ 52 unsigned int __val; \
@@ -55,6 +56,9 @@
55 : "cc"); \ 56 : "cc"); \
56 __val; \ 57 __val; \
57 }) 58 })
59#else
60#define read_cpuid(reg) (processor_id)
61#endif
58 62
59/* 63/*
60 * This is used to ensure the compiler did actually allocate the register we 64 * This is used to ensure the compiler did actually allocate the register we