diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-12-01 03:04:47 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-01 08:53:50 -0500 |
commit | 1a0ed732afdbd4b960a4b93f78fddc71b8076e61 (patch) | |
tree | cdda659c8f9020ea22fe18ed83ca021233807b4a /include/asm-arm | |
parent | eaa595cb881bba043e79638c37cb357f296a7714 (diff) |
[ARM] 3949/2: AT91: SAM9 timer driver
Add support for the timer on the Atmel AT91SAM9261 and AT91SAM9260
processors.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/at91_pit.h | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91_pit.h b/include/asm-arm/arch-at91rm9200/at91_pit.h new file mode 100644 index 000000000000..4a30d009c588 --- /dev/null +++ b/include/asm-arm/arch-at91rm9200/at91_pit.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-at91rm9200/at91_pit.h | ||
3 | * | ||
4 | * Periodic Interval Timer (PIT) - System peripherals regsters. | ||
5 | * Based on AT91SAM9261 datasheet revision D. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef AT91_PIT_H | ||
14 | #define AT91_PIT_H | ||
15 | |||
16 | #define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ | ||
17 | #define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ | ||
18 | #define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ | ||
19 | #define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ | ||
20 | |||
21 | #define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ | ||
22 | #define AT91_PIT_PITS (1 << 0) /* Timer Status */ | ||
23 | |||
24 | #define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ | ||
25 | #define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ | ||
26 | #define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ | ||
27 | #define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ | ||
28 | |||
29 | #endif | ||