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authorRussell King <rmk+lkml@arm.linux.org.uk>2006-01-08 04:02:07 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-08 23:13:46 -0500
commit9ded96f24c3a5fcbef954e88c443385a1af37eb9 (patch)
tree49f43337e2b8d63a5a28402a15d99fe27d8d2a1c /include/asm-arm
parent705b6c7b34f2621f95f606d0e683daa10cdb8eb9 (diff)
[PATCH] IRQ type flags
Some ARM platforms have the ability to program the interrupt controller to detect various interrupt edges and/or levels. For some platforms, this is critical to setup correctly, particularly those which the setting is dependent on the device. Currently, ARM drivers do (eg) the following: err = request_irq(irq, ...); set_irq_type(irq, IRQT_RISING); However, if the interrupt has previously been programmed to be level sensitive (for whatever reason) then this will cause an interrupt storm. Hence, if we combine set_irq_type() with request_irq(), we can then safely set the type prior to unmasking the interrupt. The unfortunate problem is that in order to support this, these flags need to be visible outside of the ARM architecture - drivers such as smc91x need these flags and they're cross-architecture. Finally, the SA_TRIGGER_* flag passed to request_irq() should reflect the property that the device would like. The IRQ controller code should do its best to select the most appropriate supported mode. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/irq.h12
1 files changed, 8 insertions, 4 deletions
diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h
index 59975ee43cf1..7772432d3fd7 100644
--- a/include/asm-arm/irq.h
+++ b/include/asm-arm/irq.h
@@ -25,10 +25,14 @@ extern void disable_irq_nosync(unsigned int);
25extern void disable_irq(unsigned int); 25extern void disable_irq(unsigned int);
26extern void enable_irq(unsigned int); 26extern void enable_irq(unsigned int);
27 27
28#define __IRQT_FALEDGE (1 << 0) 28/*
29#define __IRQT_RISEDGE (1 << 1) 29 * These correspond with the SA_TRIGGER_* defines, and therefore the
30#define __IRQT_LOWLVL (1 << 2) 30 * IRQRESOURCE_IRQ_* defines.
31#define __IRQT_HIGHLVL (1 << 3) 31 */
32#define __IRQT_RISEDGE (1 << 0)
33#define __IRQT_FALEDGE (1 << 1)
34#define __IRQT_HIGHLVL (1 << 2)
35#define __IRQT_LOWLVL (1 << 3)
32 36
33#define IRQT_NOEDGE (0) 37#define IRQT_NOEDGE (0)
34#define IRQT_RISING (__IRQT_RISEDGE) 38#define IRQT_RISING (__IRQT_RISEDGE)