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authorAndrew Victor <andrew@sanpeople.com>2007-02-15 02:17:38 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-15 10:33:31 -0500
commitf7eee89b2a4b4c233acde621005a814da0eb46d6 (patch)
tree25474085888884aab2a2a9338dfb0de327d15475 /include/asm-arm
parent69b2e99cf57ab8121d575a04a050314ac9c8f7e1 (diff)
[ARM] 4192/1: AT91: Support for AT91SAM9XE processors.
Add support for the Atmel AT91SAM9XE range of processors. These are basically AT91SAM9260's with different amounts of internal SRAM and Flash. We make use of the existing AT91SAM9260 support, but just perform run-time detection of the size of the internal SRAM. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-at91/at91_dbgu.h14
-rw-r--r--include/asm-arm/arch-at91/at91sam9260.h4
-rw-r--r--include/asm-arm/arch-at91/cpu.h17
3 files changed, 34 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h
index 1002a808ad91..b0369e176f7b 100644
--- a/include/asm-arm/arch-at91/at91_dbgu.h
+++ b/include/asm-arm/arch-at91/at91_dbgu.h
@@ -35,6 +35,20 @@
35#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ 35#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
36#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ 36#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */
37#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ 37#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */
38#define AT91_CIDR_SRAMSIZ_1K (1 << 16)
39#define AT91_CIDR_SRAMSIZ_2K (2 << 16)
40#define AT91_CIDR_SRAMSIZ_112K (4 << 16)
41#define AT91_CIDR_SRAMSIZ_4K (5 << 16)
42#define AT91_CIDR_SRAMSIZ_80K (6 << 16)
43#define AT91_CIDR_SRAMSIZ_160K (7 << 16)
44#define AT91_CIDR_SRAMSIZ_8K (8 << 16)
45#define AT91_CIDR_SRAMSIZ_16K (9 << 16)
46#define AT91_CIDR_SRAMSIZ_32K (10 << 16)
47#define AT91_CIDR_SRAMSIZ_64K (11 << 16)
48#define AT91_CIDR_SRAMSIZ_128K (12 << 16)
49#define AT91_CIDR_SRAMSIZ_256K (13 << 16)
50#define AT91_CIDR_SRAMSIZ_96K (14 << 16)
51#define AT91_CIDR_SRAMSIZ_512K (15 << 16)
38#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ 52#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */
39#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ 53#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
40#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ 54#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h
index 73d93ae9243e..2cadebc36af7 100644
--- a/include/asm-arm/arch-at91/at91sam9260.h
+++ b/include/asm-arm/arch-at91/at91sam9260.h
@@ -113,6 +113,10 @@
113 113
114#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ 114#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */
115 115
116#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */
117#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */
118
119
116#if 0 120#if 0
117/* 121/*
118 * PIO pin definitions (peripheral A/B multiplexing). 122 * PIO pin definitions (peripheral A/B multiplexing).
diff --git a/include/asm-arm/arch-at91/cpu.h b/include/asm-arm/arch-at91/cpu.h
index 9efde0dad249..d464ca58cdbc 100644
--- a/include/asm-arm/arch-at91/cpu.h
+++ b/include/asm-arm/arch-at91/cpu.h
@@ -22,6 +22,9 @@
22#define ARCH_ID_AT91SAM9261 0x019703a0 22#define ARCH_ID_AT91SAM9261 0x019703a0
23#define ARCH_ID_AT91SAM9263 0x019607a0 23#define ARCH_ID_AT91SAM9263 0x019607a0
24 24
25#define ARCH_ID_AT91SAM9XE128 0x329973a0
26#define ARCH_ID_AT91SAM9XE256 0x329a93a0
27#define ARCH_ID_AT91SAM9XE512 0x329aa3a0
25 28
26static inline unsigned long at91_cpu_identify(void) 29static inline unsigned long at91_cpu_identify(void)
27{ 30{
@@ -29,6 +32,16 @@ static inline unsigned long at91_cpu_identify(void)
29} 32}
30 33
31 34
35#define ARCH_FAMILY_AT91X92 0x09200000
36#define ARCH_FAMILY_AT91SAM9 0x01900000
37#define ARCH_FAMILY_AT91SAM9XE 0x02900000
38
39static inline unsigned long at91_arch_identify(void)
40{
41 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
42}
43
44
32#ifdef CONFIG_ARCH_AT91RM9200 45#ifdef CONFIG_ARCH_AT91RM9200
33#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) 46#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
34#else 47#else
@@ -36,8 +49,10 @@ static inline unsigned long at91_cpu_identify(void)
36#endif 49#endif
37 50
38#ifdef CONFIG_ARCH_AT91SAM9260 51#ifdef CONFIG_ARCH_AT91SAM9260
39#define cpu_is_at91sam9260() (at91_cpu_identify() == ARCH_ID_AT91SAM9260) 52#define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
53#define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
40#else 54#else
55#define cpu_is_at91sam9xe() (0)
41#define cpu_is_at91sam9260() (0) 56#define cpu_is_at91sam9260() (0)
42#endif 57#endif
43 58