Merge master.kernel.org:/home/rmk/linux-2.6-arm

64 files changed, 276 insertions, 990 deletions

diff --git a/include/asm-arm/arch-aaec2000/dma.h b/include/asm-arm/arch-aaec2000/dma.h
index 28c890b4a1d3..e100b1e526fe 100644
--- a/include/asm-arm/arch-aaec2000/dma.h
+++ b/include/asm-arm/arch-aaec2000/dma.h
@@ -7,11 +7,3 @@
  *  it under the terms of the GNU General Public License version 2 as
  *  published by the Free Software Foundation.
  */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-#define MAX_DMA_CHANNELS        0
-
-#endif
diff --git a/include/asm-arm/arch-cl7500/dma.h b/include/asm-arm/arch-cl7500/dma.h
index 1d6a8829d327..591ed2551892 100644
--- a/include/asm-arm/arch-cl7500/dma.h
+++ b/include/asm-arm/arch-cl7500/dma.h
@@ -15,7 +15,6 @@
  * bytes of RAM.
  */
 #define MAX_DMA_ADDRESS         0xd0000000
-#define MAX_DMA_CHANNELS        0
 
 #define DMA_S0                  0
 
diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S
index 686f413f82d6..c9e5395e5106 100644
--- a/include/asm-arm/arch-cl7500/entry-macro.S
+++ b/include/asm-arm/arch-cl7500/entry-macro.S
@@ -1,3 +1,3 @@
-
+#include <asm/hardware.h>
 #include <asm/hardware/entry-macro-iomd.S>
 
diff --git a/include/asm-arm/arch-clps711x/dma.h b/include/asm-arm/arch-clps711x/dma.h
index 3c4c5c843252..610997938423 100644
--- a/include/asm-arm/arch-clps711x/dma.h
+++ b/include/asm-arm/arch-clps711x/dma.h
@@ -17,12 +17,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
-
diff --git a/include/asm-arm/arch-clps711x/entry-macro.S b/include/asm-arm/arch-clps711x/entry-macro.S
index b31079a1d4a9..21f6ee485819 100644
--- a/include/asm-arm/arch-clps711x/entry-macro.S
+++ b/include/asm-arm/arch-clps711x/entry-macro.S
@@ -7,6 +7,7 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
 #include <asm/hardware/clps7111.h>
 
                 .macro  disable_fiq
diff --git a/include/asm-arm/arch-clps711x/system.h b/include/asm-arm/arch-clps711x/system.h
index 2ab981fee37f..11e1491535a8 100644
--- a/include/asm-arm/arch-clps711x/system.h
+++ b/include/asm-arm/arch-clps711x/system.h
@@ -20,7 +20,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
+#include <asm/hardware.h>
 #include <asm/hardware/clps7111.h>
+#include <asm/io.h>
 
 static inline void arch_idle(void)
 {
diff --git a/include/asm-arm/arch-ebsa110/dma.h b/include/asm-arm/arch-ebsa110/dma.h
index d491776ac1cc..c52f9e2ab0bb 100644
--- a/include/asm-arm/arch-ebsa110/dma.h
+++ b/include/asm-arm/arch-ebsa110/dma.h
@@ -9,11 +9,3 @@
  *
  *  EBSA110 DMA definitions
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
-
diff --git a/include/asm-arm/arch-ebsa285/dma.h b/include/asm-arm/arch-ebsa285/dma.h
index c43046eb8bc7..0259ad45d33c 100644
--- a/include/asm-arm/arch-ebsa285/dma.h
+++ b/include/asm-arm/arch-ebsa285/dma.h
@@ -10,11 +10,6 @@
 #define __ASM_ARCH_DMA_H
 
 /*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS         0xffffffff
-
-/*
  * The 21285 has two internal DMA channels; we call these 8 and 9.
  * On CATS hardware we have an additional eight ISA dma channels
  * numbered 0..7.
diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S
index db5729ff6349..cf10ac96fdde 100644
--- a/include/asm-arm/arch-ebsa285/entry-macro.S
+++ b/include/asm-arm/arch-ebsa285/entry-macro.S
@@ -7,6 +7,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
+#include <asm/arch/irqs.h>
 #include <asm/hardware/dec21285.h>
 
                 .macro  disable_fiq
diff --git a/include/asm-arm/arch-epxa10db/dma.h b/include/asm-arm/arch-epxa10db/dma.h
index 5d97734d1077..de20ec8e74b1 100644
--- a/include/asm-arm/arch-epxa10db/dma.h
+++ b/include/asm-arm/arch-epxa10db/dma.h
@@ -17,12 +17,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
-
diff --git a/include/asm-arm/arch-imx/dma.h b/include/asm-arm/arch-imx/dma.h
index dbdc01780413..b45fa367d71e 100644
--- a/include/asm-arm/arch-imx/dma.h
+++ b/include/asm-arm/arch-imx/dma.h
@@ -20,10 +20,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS         0xffffffff
-
-#define MAX_DMA_CHANNELS        0
-
 /*
  * DMA registration
  */
diff --git a/include/asm-arm/arch-imx/entry-macro.S b/include/asm-arm/arch-imx/entry-macro.S
index b40ea7cf88ec..3b9ef6914627 100644
--- a/include/asm-arm/arch-imx/entry-macro.S
+++ b/include/asm-arm/arch-imx/entry-macro.S
@@ -7,6 +7,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
+
                 .macro  disable_fiq
                 .endm
 #define AITC_NIVECSR   0x40
diff --git a/include/asm-arm/arch-integrator/debug-macro.S b/include/asm-arm/arch-integrator/debug-macro.S
index 484a1aa47098..031d30941791 100644
--- a/include/asm-arm/arch-integrator/debug-macro.S
+++ b/include/asm-arm/arch-integrator/debug-macro.S
@@ -11,7 +11,7 @@
  *
 */
 
-#include <asm/hardware/amba_serial.h>
+#include <linux/amba/serial.h>
 
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
diff --git a/include/asm-arm/arch-integrator/dma.h b/include/asm-arm/arch-integrator/dma.h
index 7171792290bd..83fd6bbaf9d3 100644
--- a/include/asm-arm/arch-integrator/dma.h
+++ b/include/asm-arm/arch-integrator/dma.h
@@ -17,12 +17,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
-
diff --git a/include/asm-arm/arch-integrator/entry-macro.S b/include/asm-arm/arch-integrator/entry-macro.S
index 44f7ee613194..69838d04f90b 100644
--- a/include/asm-arm/arch-integrator/entry-macro.S
+++ b/include/asm-arm/arch-integrator/entry-macro.S
@@ -7,6 +7,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
+#include <asm/arch/irqs.h>
 
                 .macro  disable_fiq
                 .endm
diff --git a/include/asm-arm/arch-iop3xx/dma.h b/include/asm-arm/arch-iop3xx/dma.h
index 797f9e6fc745..1e808db8af2a 100644
--- a/include/asm-arm/arch-iop3xx/dma.h
+++ b/include/asm-arm/arch-iop3xx/dma.h
@@ -7,10 +7,3 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-
-#ifndef _IOP3XX_DMA_H_P
-#define _IOP3XX_DMA_H_P
-
-#define MAX_DMA_ADDRESS         0xffffffff
-
-#endif /* _ASM_ARCH_DMA_H_P */
diff --git a/include/asm-arm/arch-iop3xx/entry-macro.S b/include/asm-arm/arch-iop3xx/entry-macro.S
index e2ce7f5467c8..926668c098a5 100644
--- a/include/asm-arm/arch-iop3xx/entry-macro.S
+++ b/include/asm-arm/arch-iop3xx/entry-macro.S
@@ -7,6 +7,7 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/arch/irqs.h>
 
 #if defined(CONFIG_ARCH_IOP321)
                 .macro  disable_fiq
diff --git a/include/asm-arm/arch-ixp2000/dma.h b/include/asm-arm/arch-ixp2000/dma.h
index 0fb3568a98dd..548d8dc507eb 100644
--- a/include/asm-arm/arch-ixp2000/dma.h
+++ b/include/asm-arm/arch-ixp2000/dma.h
@@ -7,12 +7,3 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-
-/* No DMA */
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ixp2000/enp2611.h b/include/asm-arm/arch-ixp2000/enp2611.h
index 95128d9f5026..42f3c28dc5c4 100644
--- a/include/asm-arm/arch-ixp2000/enp2611.h
+++ b/include/asm-arm/arch-ixp2000/enp2611.h
@@ -36,5 +36,11 @@
 #define ENP2611_GPIO_SCL                7
 #define ENP2611_GPIO_SDA                6
 
+#define IRQ_ENP2611_THERMAL             IRQ_IXP2000_GPIO4
+#define IRQ_ENP2611_OPTION_BOARD        IRQ_IXP2000_GPIO3
+#define IRQ_ENP2611_CALEB               IRQ_IXP2000_GPIO2
+#define IRQ_ENP2611_PM3386_1            IRQ_IXP2000_GPIO1
+#define IRQ_ENP2611_PM3386_0            IRQ_IXP2000_GPIO0
+
 
 #endif
diff --git a/include/asm-arm/arch-ixp2000/entry-macro.S b/include/asm-arm/arch-ixp2000/entry-macro.S
index e3a4e4121298..16e1e6124b31 100644
--- a/include/asm-arm/arch-ixp2000/entry-macro.S
+++ b/include/asm-arm/arch-ixp2000/entry-macro.S
@@ -7,6 +7,7 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/arch/irqs.h>
 
                 .macro  disable_fiq
                 .endm
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index 7fbcdf9931ee..c0ff2c6c66e7 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -131,102 +131,4 @@
 #endif
 
 
-#ifdef CONFIG_ARCH_IXDP2X01
-/*
- * This is an ugly hack but the CS8900 on the 2x01's does not sit in any sort
- * of "I/O space" and is just direct mapped into a 32-bit-only addressable
- * bus. The address space for this bus is such that we can't really easily
- * make it contiguous to the PCI I/O address range, and it also does not
- * need swapping like PCI addresses do (IXDP2x01 is a BE platform).
- * B/C of this we can't use the standard in/out functions and need to
- * runtime check if the incoming address is a PCI address or for
- * the CS89x0.
- */
-#undef inw
-#undef outw
-#undef insw
-#undef outsw
-
-#include <asm/mach-types.h>
-
-static inline void insw(u32 ptr, void *buf, int length)
-{
-        register volatile u32 *port = (volatile u32 *)ptr;
-
-        /*
-         * Is this cycle meant for the CS8900?
-         */
-        if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
-                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
-                u8 *buf8 = (u8*)buf;
-                register u32 tmp32;
-
-                do {
-                        tmp32 = *port;
-                        *buf8++ = (u8)tmp32;
-                        *buf8++ = (u8)(tmp32 >> 8);
-                } while(--length);
-
-                return;
-        }
-
-        __raw_readsw(alignw(___io(ptr)),buf,length);
-}
-
-static inline void outsw(u32 ptr, void *buf, int length)
-{
-        register volatile u32 *port = (volatile u32 *)ptr;
-
-        /*
-         * Is this cycle meant for the CS8900?
-         */
-        if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
-                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
-                register u32 tmp32;
-                u8 *buf8 = (u8*)buf;
-                do {
-                        tmp32 = *buf8++;
-                        tmp32 |= (*buf8++) << 8;
-                        *port = tmp32;
-                } while(--length);
-                return;
-        }
-
-        __raw_writesw(alignw(___io(ptr)),buf,length);
-}
-
-
-static inline u16 inw(u32 ptr)
-{
-        register volatile u32 *port = (volatile u32 *)ptr;
-
-        /*
-         * Is this cycle meant for the CS8900?
-         */
-        if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
-                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
-                return (u16)(*port);  
-        }
-
-        return __raw_readw(alignw(___io(ptr)));
-}
-
-static inline void outw(u16 value, u32 ptr)
-{
-        register volatile u32 *port = (volatile u32 *)ptr;
-
-        if ((machine_is_ixdp2401() || machine_is_ixdp2801()) && 
-                (((u32)port >= (u32)IXDP2X01_CS8900_VIRT_BASE) &&
-                 ((u32)port <= (u32)IXDP2X01_CS8900_VIRT_END))) {
-                *port = value;  
-                return;
-        }
-
-        __raw_writew((value),alignw(___io(ptr)));
-}
-#endif  /* IXDP2x01 */
-
 #endif
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index fc5ac6aec4f2..8cf70ff160af 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -156,6 +156,14 @@
 #define IXP2000_IRQ_THD_RAW_STATUS_B_1  IXP2000_INTCTL_REG(0x84)
 #define IXP2000_IRQ_THD_RAW_STATUS_B_2  IXP2000_INTCTL_REG(0x88)
 #define IXP2000_IRQ_THD_RAW_STATUS_B_3  IXP2000_INTCTL_REG(0x8c)
+#define IXP2000_IRQ_THD_STATUS_A_0      IXP2000_INTCTL_REG(0xe0)
+#define IXP2000_IRQ_THD_STATUS_A_1      IXP2000_INTCTL_REG(0xe4)
+#define IXP2000_IRQ_THD_STATUS_A_2      IXP2000_INTCTL_REG(0xe8)
+#define IXP2000_IRQ_THD_STATUS_A_3      IXP2000_INTCTL_REG(0xec)
+#define IXP2000_IRQ_THD_STATUS_B_0      IXP2000_INTCTL_REG(0x100)
+#define IXP2000_IRQ_THD_STATUS_B_1      IXP2000_INTCTL_REG(0x104)
+#define IXP2000_IRQ_THD_STATUS_B_2      IXP2000_INTCTL_REG(0x108)
+#define IXP2000_IRQ_THD_STATUS_B_3      IXP2000_INTCTL_REG(0x10c)
 #define IXP2000_IRQ_THD_ENABLE_SET_A_0  IXP2000_INTCTL_REG(0x160)
 #define IXP2000_IRQ_THD_ENABLE_SET_A_1  IXP2000_INTCTL_REG(0x164)
 #define IXP2000_IRQ_THD_ENABLE_SET_A_2  IXP2000_INTCTL_REG(0x168)
diff --git a/include/asm-arm/arch-ixp4xx/coyote.h b/include/asm-arm/arch-ixp4xx/coyote.h
index dd0c2d2d8503..7ac9ba2c035c 100644
--- a/include/asm-arm/arch-ixp4xx/coyote.h
+++ b/include/asm-arm/arch-ixp4xx/coyote.h
@@ -16,9 +16,6 @@
 #error "Do not include this directly, instead #include <asm/hardware.h>"
 #endif
 
-#define COYOTE_FLASH_BASE       IXP4XX_EXP_BUS_CS0_BASE_PHYS
-#define COYOTE_FLASH_SIZE       IXP4XX_EXP_BUS_CSX_REGION_SIZE * 2
-
 /* PCI controller GPIO to IRQ pin mappings */
 #define COYOTE_PCI_SLOT0_PIN    6
 #define COYOTE_PCI_SLOT1_PIN    11
@@ -26,7 +23,7 @@
 #define COYOTE_PCI_SLOT0_DEVID  14
 #define COYOTE_PCI_SLOT1_DEVID  15
 
-#define COYOTE_IDE_BASE_PHYS    IXP4XX_EXP_BUS_CS3_BASE_PHYS
+#define COYOTE_IDE_BASE_PHYS    IXP4XX_EXP_BUS_BASE(3)
 #define COYOTE_IDE_BASE_VIRT    0xFFFE1000
 #define COYOTE_IDE_REGION_SIZE  0x1000
 
diff --git a/include/asm-arm/arch-ixp4xx/dma.h b/include/asm-arm/arch-ixp4xx/dma.h
index 312065dc0e7a..b1a071ecebc8 100644
--- a/include/asm-arm/arch-ixp4xx/dma.h
+++ b/include/asm-arm/arch-ixp4xx/dma.h
@@ -20,7 +20,4 @@
 
 #define MAX_DMA_ADDRESS         (PAGE_OFFSET + SZ_64M)
 
-/* No DMA */
-#define MAX_DMA_CHANNELS        0
-
 #endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S
index 323b0bc4a39c..27e124132e4c 100644
--- a/include/asm-arm/arch-ixp4xx/entry-macro.S
+++ b/include/asm-arm/arch-ixp4xx/entry-macro.S
@@ -7,6 +7,7 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
 
                 .macro  disable_fiq
                 .endm
diff --git a/include/asm-arm/arch-ixp4xx/gtwx5715.h b/include/asm-arm/arch-ixp4xx/gtwx5715.h
index fc460af70627..c3069d67c00e 100644
--- a/include/asm-arm/arch-ixp4xx/gtwx5715.h
+++ b/include/asm-arm/arch-ixp4xx/gtwx5715.h
@@ -57,10 +57,6 @@
 #define GTWX5715_GPIO13_IRQ             IRQ_IXP4XX_SW_INT1
 #define GTWX5715_GPIO14_IRQ             IRQ_IXP4XX_SW_INT2
 
-
-#define GTWX5715_FLASH_BASE     IXP4XX_EXP_BUS_CS0_BASE_PHYS
-#define GTWX5715_FLASH_SIZE     (0x00800000)
-
 /* PCI controller GPIO to IRQ pin mappings
 
                         INTA    INTB
diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h
index cfb413c845f7..6acb69c95ef9 100644
--- a/include/asm-arm/arch-ixp4xx/hardware.h
+++ b/include/asm-arm/arch-ixp4xx/hardware.h
@@ -45,5 +45,6 @@ extern unsigned int processor_id;
 #include "coyote.h"
 #include "prpmc1100.h"
 #include "nslu2.h"
+#include "nas100d.h"
 
 #endif  /* _ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h
index 2cf4930372bc..f24b763ca18e 100644
--- a/include/asm-arm/arch-ixp4xx/irqs.h
+++ b/include/asm-arm/arch-ixp4xx/irqs.h
@@ -100,4 +100,13 @@
 #define        IRQ_NSLU2_PCI_INTB      IRQ_IXP4XX_GPIO10
 #define        IRQ_NSLU2_PCI_INTC      IRQ_IXP4XX_GPIO9
 
+/*
+ * NAS100D board IRQs
+ */
+#define        IRQ_NAS100D_PCI_INTA    IRQ_IXP4XX_GPIO11
+#define        IRQ_NAS100D_PCI_INTB    IRQ_IXP4XX_GPIO10
+#define        IRQ_NAS100D_PCI_INTC    IRQ_IXP4XX_GPIO9
+#define        IRQ_NAS100D_PCI_INTD    IRQ_IXP4XX_GPIO8
+#define        IRQ_NAS100D_PCI_INTE    IRQ_IXP4XX_GPIO7
+
 #endif
diff --git a/include/asm-arm/arch-ixp4xx/ixdp425.h b/include/asm-arm/arch-ixp4xx/ixdp425.h
index 7d21bf941379..3d3820d7ba09 100644
--- a/include/asm-arm/arch-ixp4xx/ixdp425.h
+++ b/include/asm-arm/arch-ixp4xx/ixdp425.h
@@ -16,9 +16,6 @@
 #error "Do not include this directly, instead #include <asm/hardware.h>"
 #endif
 
-#define IXDP425_FLASH_BASE      IXP4XX_EXP_BUS_CS0_BASE_PHYS
-#define IXDP425_FLASH_SIZE      IXP4XX_EXP_BUS_CSX_REGION_SIZE
-
 #define IXDP425_SDA_PIN         7
 #define IXDP425_SCL_PIN         6
 
diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h
index e024d0a1a669..ee211d28a3ef 100644
--- a/include/asm-arm/arch-ixp4xx/memory.h
+++ b/include/asm-arm/arch-ixp4xx/memory.h
@@ -16,31 +16,10 @@
 
 #ifndef __ASSEMBLY__
 
-/*
- * Only first 64MB of memory can be accessed via PCI.
- * We use GFP_DMA to allocate safe buffers to do map/unmap.
- * This is really ugly and we need a better way of specifying
- * DMA-capable regions of memory.
- */
-static inline void __arch_adjust_zones(int node, unsigned long *zone_size, 
-        unsigned long *zhole_size) 
-{
-        unsigned int sz = SZ_64M >> PAGE_SHIFT;
-
-        /*
-         * Only adjust if > 64M on current system
-         */
-        if (node || (zone_size[0] <= sz))
-                return;
-
-        zone_size[1] = zone_size[0] - sz;
-        zone_size[0] = sz;
-        zhole_size[1] = zhole_size[0];
-        zhole_size[0] = 0;
-}
+void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes);
 
 #define arch_adjust_zones(node, size, holes) \
-        __arch_adjust_zones(node, size, holes)
+        ixp4xx_adjust_zones(node, size, holes)
 
 #define ISA_DMA_THRESHOLD (SZ_64M - 1)
 
diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h
new file mode 100644
index 000000000000..51ac0180427c
--- /dev/null
+++ b/include/asm-arm/arch-ixp4xx/nas100d.h
@@ -0,0 +1,72 @@
+/*
+ * include/asm-arm/arch-ixp4xx/nas100d.h
+ *
+ * NAS100D platform specific definitions
+ *
+ * Copyright (c) 2005 Tower Technologies
+ *
+ * Author: Alessandro Zummo <a.zummo@towertech.it>
+ *
+ * based on ixdp425.h:
+ *      Copyright 2004 (c) MontaVista, Software, Inc.
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_H__
+#error "Do not include this directly, instead #include <asm/hardware.h>"
+#endif
+
+#define NAS100D_SDA_PIN         6
+#define NAS100D_SCL_PIN         5
+
+/*
+ * NAS100D PCI IRQs
+ */
+#define NAS100D_PCI_MAX_DEV     3
+#define NAS100D_PCI_IRQ_LINES   3
+
+
+/* PCI controller GPIO to IRQ pin mappings */
+#define NAS100D_PCI_INTA_PIN    11
+#define NAS100D_PCI_INTB_PIN    10
+#define NAS100D_PCI_INTC_PIN    9
+#define NAS100D_PCI_INTD_PIN    8
+#define NAS100D_PCI_INTE_PIN    7
+
+/* GPIO */
+
+#define NAS100D_GPIO0           0
+#define NAS100D_GPIO1           1
+#define NAS100D_GPIO2           2
+#define NAS100D_GPIO3           3
+#define NAS100D_GPIO4           4
+#define NAS100D_GPIO5           5
+#define NAS100D_GPIO6           6
+#define NAS100D_GPIO7           7
+#define NAS100D_GPIO8           8
+#define NAS100D_GPIO9           9
+#define NAS100D_GPIO10          10
+#define NAS100D_GPIO11          11
+#define NAS100D_GPIO12          12
+#define NAS100D_GPIO13          13
+#define NAS100D_GPIO14          14
+#define NAS100D_GPIO15          15
+
+
+/* Buttons */
+
+#define NAS100D_PB_GPIO         NAS100D_GPIO14
+#define NAS100D_RB_GPIO         NAS100D_GPIO4
+#define NAS100D_PO_GPIO         NAS100D_GPIO12   /* power off */
+
+#define NAS100D_PB_IRQ          IRQ_IXP4XX_GPIO14
+#define NAS100D_RB_IRQ          IRQ_IXP4XX_GPIO4
+
+/*
+#define NAS100D_PB_BM           (1L << NAS100D_PB_GPIO)
+#define NAS100D_PO_BM           (1L << NAS100D_PO_GPIO)
+#define NAS100D_RB_BM           (1L << NAS100D_RB_GPIO)
+*/
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
index b8b347a559c7..4281838873ef 100644
--- a/include/asm-arm/arch-ixp4xx/nslu2.h
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -18,9 +18,6 @@
 #error "Do not include this directly, instead #include <asm/hardware.h>"
 #endif
 
-#define NSLU2_FLASH_BASE        IXP4XX_EXP_BUS_CS0_BASE_PHYS
-#define NSLU2_FLASH_SIZE        IXP4XX_EXP_BUS_CSX_REGION_SIZE
-
 #define NSLU2_SDA_PIN           7
 #define NSLU2_SCL_PIN           6
 
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index f14ed63590c3..daf9790645ca 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -26,16 +26,17 @@
  */
 #define IXP4XX_EXP_BUS_BASE_PHYS        (0x50000000)
 
-#define IXP4XX_EXP_BUS_CSX_REGION_SIZE  (0x01000000)
+/*
+ * The expansion bus on the IXP4xx can be configured for either 16 or
+ * 32MB windows and the CS offset for each region changes based on the
+ * current configuration. This means that we cannot simply hardcode
+ * each offset. ixp4xx_sys_init() looks at the expansion bus configuration
+ * as setup by the bootloader to determine our window size.
+ */
+extern unsigned long ixp4xx_exp_bus_size;
 
-#define IXP4XX_EXP_BUS_CS0_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x00000000)
-#define IXP4XX_EXP_BUS_CS1_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x01000000)
-#define IXP4XX_EXP_BUS_CS2_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x02000000)
-#define IXP4XX_EXP_BUS_CS3_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x03000000)
-#define IXP4XX_EXP_BUS_CS4_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x04000000)
-#define IXP4XX_EXP_BUS_CS5_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x05000000)
-#define IXP4XX_EXP_BUS_CS6_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x06000000)
-#define IXP4XX_EXP_BUS_CS7_BASE_PHYS    (IXP4XX_EXP_BUS_BASE_PHYS + 0x07000000)
+#define IXP4XX_EXP_BUS_BASE(region)\
+                (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
 
 #define IXP4XX_FLASH_WRITABLE   (0x2)
 #define IXP4XX_FLASH_DEFAULT    (0xbcd23c40)
@@ -112,10 +113,5 @@ static inline void gpio_line_set(u8 line, int value)
             *IXP4XX_GPIO_GPOUTR &= ~(1 << line);
 }
 
-static inline void gpio_line_isr_clear(u8 line)
-{
-        *IXP4XX_GPIO_GPISR = (1 << line);
-}
-
 #endif // __ASSEMBLY__
 
diff --git a/include/asm-arm/arch-l7200/dma.h b/include/asm-arm/arch-l7200/dma.h
index 6595b386cfc9..4c7eca63f035 100644
--- a/include/asm-arm/arch-l7200/dma.h
+++ b/include/asm-arm/arch-l7200/dma.h
@@ -17,7 +17,6 @@
  * bytes of RAM.
  */
 #define MAX_DMA_ADDRESS         0xd0000000
-#define MAX_DMA_CHANNELS        0
 
 #define DMA_S0                  0
 
diff --git a/include/asm-arm/arch-l7200/system.h b/include/asm-arm/arch-l7200/system.h
index cb4ff29059b8..18825cf071ba 100644
--- a/include/asm-arm/arch-l7200/system.h
+++ b/include/asm-arm/arch-l7200/system.h
@@ -12,6 +12,8 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 
+#include <asm/hardware.h>
+
 static inline void arch_idle(void)
 {
         *(unsigned long *)(IO_BASE + 0x50004) = 1;      /* idle mode */
diff --git a/include/asm-arm/arch-lh7a40x/dma.h b/include/asm-arm/arch-lh7a40x/dma.h
index 5797f01e1844..15492e3253f6 100644
--- a/include/asm-arm/arch-lh7a40x/dma.h
+++ b/include/asm-arm/arch-lh7a40x/dma.h
@@ -7,11 +7,3 @@
  *  version 2 as published by the Free Software Foundation.
  *
  */
-
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-#define MAX_DMA_CHANNELS        0 /* All DMA is internal to CPU */
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-lh7a40x/entry-macro.S b/include/asm-arm/arch-lh7a40x/entry-macro.S
index 865f396aa63c..a2f67c06d9c9 100644
--- a/include/asm-arm/arch-lh7a40x/entry-macro.S
+++ b/include/asm-arm/arch-lh7a40x/entry-macro.S
@@ -7,6 +7,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
+#include <asm/arch/irqs.h>
 
 # if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404)
 #  error "LH7A400 and LH7A404 are mutually exclusive"
diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h
index ccbcb580a5c1..d4e73efcb816 100644
--- a/include/asm-arm/arch-omap/dma.h
+++ b/include/asm-arm/arch-omap/dma.h
@@ -21,9 +21,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS                 0xffffffff
-#define MAX_DMA_CHANNELS                0
-
 /* Hardware registers for omap1 */
 #define OMAP_DMA_BASE                   (0xfffed800)
 #define OMAP_DMA_GCR                    (OMAP_DMA_BASE + 0x400)
diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S
index f8814a84910e..0ffb1185f1ac 100644
--- a/include/asm-arm/arch-omap/entry-macro.S
+++ b/include/asm-arm/arch-omap/entry-macro.S
@@ -7,6 +7,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
+#include <asm/arch/irqs.h>
 
 #if defined(CONFIG_ARCH_OMAP1)
 
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h
index 9af415d2944a..6724a81bd10b 100644
--- a/include/asm-arm/arch-omap/system.h
+++ b/include/asm-arm/arch-omap/system.h
@@ -5,8 +5,9 @@
 #ifndef __ASM_ARCH_SYSTEM_H
 #define __ASM_ARCH_SYSTEM_H
 #include <linux/config.h>
+#include <linux/clk.h>
+
 #include <asm/mach-types.h>
-#include <asm/hardware/clock.h>
 #include <asm/hardware.h>
 #include <asm/arch/prcm.h>
 
diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h
index 56db3d49bfc8..3e88a2a02a0f 100644
--- a/include/asm-arm/arch-pxa/dma.h
+++ b/include/asm-arm/arch-pxa/dma.h
@@ -12,11 +12,6 @@
 #ifndef __ASM_ARCH_DMA_H
 #define __ASM_ARCH_DMA_H
 
-#define MAX_DMA_ADDRESS         0xffffffff
-
-/* No DMA as the rest of the world see it */
-#define MAX_DMA_CHANNELS        0
-
 /*
  * Descriptor structure for PXA's DMA engine
  * Note: this structure must always be aligned to a 16-byte boundary.
diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S
index 2abfc8bb3ee5..4985e33afc12 100644
--- a/include/asm-arm/arch-pxa/entry-macro.S
+++ b/include/asm-arm/arch-pxa/entry-macro.S
@@ -7,6 +7,8 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
+#include <asm/hardware.h>
+#include <asm/arch/irqs.h>
 
                 .macro  disable_fiq
                 .endm
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index a75a2470f4f5..dae138b9cac5 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -2042,6 +2042,18 @@
 
 #ifdef CONFIG_PXA27x
 
+#define ARB_CNTRL       __REG(0x48000048)  /* Arbiter Control Register */
+
+#define ARB_DMA_SLV_PARK        (1<<31)    /* Be parked with DMA slave when idle */
+#define ARB_CI_PARK             (1<<30)    /* Be parked with Camera Interface when idle */
+#define ARB_EX_MEM_PARK         (1<<29)    /* Be parked with external MEMC when idle */
+#define ARB_INT_MEM_PARK        (1<<28)    /* Be parked with internal MEMC when idle */
+#define ARB_USB_PARK            (1<<27)    /* Be parked with USB when idle */
+#define ARB_LCD_PARK            (1<<26)    /* Be parked with LCD when idle */
+#define ARB_DMA_PARK            (1<<25)    /* Be parked with DMA when idle */
+#define ARB_CORE_PARK           (1<<24)    /* Be parked with core when idle */
+#define ARB_LOCK_FLAG           (1<<23)    /* Only Locking masters gain access to the bus */
+
 /*
  * Keypad
  */
diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S
index ed28bd012236..017ad996848d 100644
--- a/include/asm-arm/arch-realview/debug-macro.S
+++ b/include/asm-arm/arch-realview/debug-macro.S
@@ -11,7 +11,7 @@
  *
 */
 
-#include <asm/hardware/amba_serial.h>
+#include <linux/amba/serial.h>
 
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
diff --git a/include/asm-arm/arch-realview/dma.h b/include/asm-arm/arch-realview/dma.h
index 744491a74bd9..8342e3f9d6ec 100644
--- a/include/asm-arm/arch-realview/dma.h
+++ b/include/asm-arm/arch-realview/dma.h
@@ -18,10 +18,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S
index 6288fad0dc41..1a6eec86bd47 100644
--- a/include/asm-arm/arch-realview/entry-macro.S
+++ b/include/asm-arm/arch-realview/entry-macro.S
@@ -7,7 +7,7 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-
+#include <asm/hardware.h>
 #include <asm/hardware/gic.h>
 
                 .macro  disable_fiq
diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S
index 686f413f82d6..c9e5395e5106 100644
--- a/include/asm-arm/arch-rpc/entry-macro.S
+++ b/include/asm-arm/arch-rpc/entry-macro.S
@@ -1,3 +1,3 @@
-
+#include <asm/hardware.h>
 #include <asm/hardware/entry-macro-iomd.S>
 
diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h
index e830a40e573a..b011e14f3bc6 100644
--- a/include/asm-arm/arch-s3c2410/dma.h
+++ b/include/asm-arm/arch-s3c2410/dma.h
@@ -31,14 +31,6 @@
 #define MAX_DMA_TRANSFER_SIZE   0x100000 /* Data Unit is half word  */
 
 
-/* according to the samsung port, we cannot use the regular
- * dma channels... we must therefore provide our own interface
- * for DMA, and allow our drivers to use that.
- */
-
-#define MAX_DMA_CHANNELS        0
-
-
 /* we have 4 dma channels */
 #define S3C2410_DMA_CHANNELS        (4)
 
diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S
index b7d4d7f4422d..cc06b1bd37b2 100644
--- a/include/asm-arm/arch-s3c2410/entry-macro.S
+++ b/include/asm-arm/arch-s3c2410/entry-macro.S
@@ -10,6 +10,8 @@
  * Modifications:
  *     10-Mar-2005 LCVR  Changed S3C2410_VA to S3C24XX_VA
  */
+#include <asm/hardware.h>
+#include <asm/arch/irqs.h>
 
 
         .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
diff --git a/include/asm-arm/arch-sa1100/dma.h b/include/asm-arm/arch-sa1100/dma.h
index 3d60ed9f8c34..02575d72ac6b 100644
--- a/include/asm-arm/arch-sa1100/dma.h
+++ b/include/asm-arm/arch-sa1100/dma.h
@@ -15,20 +15,6 @@
 
 
 /*
- * This is the maximum DMA address that can be DMAd to.
- */
-#define MAX_DMA_ADDRESS         0xffffffff
-
-
-/*
- * The regular generic DMA interface is inappropriate for the
- * SA1100 DMA model.  None of the SA1100 specific drivers using
- * DMA are portable anyway so it's pointless to try to twist the
- * regular DMA API to accommodate them.
- */
-#define MAX_DMA_CHANNELS        0
-
-/*
  * The SA1100 has six internal DMA channels.
  */
 #define SA1100_DMA_CHANNELS     6
diff --git a/include/asm-arm/arch-versatile/debug-macro.S b/include/asm-arm/arch-versatile/debug-macro.S
index 89e38ac1444e..ef6167116dbb 100644
--- a/include/asm-arm/arch-versatile/debug-macro.S
+++ b/include/asm-arm/arch-versatile/debug-macro.S
@@ -11,7 +11,7 @@
  *
 */
 
-#include <asm/hardware/amba_serial.h>
+#include <linux/amba/serial.h>
 
                 .macro  addruart,rx
                 mrc     p15, 0, \rx, c1, c0
diff --git a/include/asm-arm/arch-versatile/dma.h b/include/asm-arm/arch-versatile/dma.h
index dcc8ac26eac0..642577348623 100644
--- a/include/asm-arm/arch-versatile/dma.h
+++ b/include/asm-arm/arch-versatile/dma.h
@@ -18,10 +18,3 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
-#ifndef __ASM_ARCH_DMA_H
-#define __ASM_ARCH_DMA_H
-
-#define MAX_DMA_ADDRESS         0xffffffff
-#define MAX_DMA_CHANNELS        0
-
-#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S
index 90e4e970d253..58f0d71759f6 100644
--- a/include/asm-arm/arch-versatile/entry-macro.S
+++ b/include/asm-arm/arch-versatile/entry-macro.S
@@ -7,7 +7,9 @@
  * License version 2. This program is licensed "as is" without any
  * warranty of any kind, whether express or implied.
  */
-                        .macro  disable_fiq
+#include <asm/hardware.h>
+
+                .macro  disable_fiq
                 .endm
 
                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h
index d648a1915c33..741f5bc5d016 100644
--- a/include/asm-arm/byteorder.h
+++ b/include/asm-arm/byteorder.h
@@ -15,9 +15,23 @@
 #ifndef __ASM_ARM_BYTEORDER_H
 #define __ASM_ARM_BYTEORDER_H
 
-
+#include <linux/compiler.h>
 #include <asm/types.h>
 
+static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
+{
+        __u32 t;
+
+        t = x ^ ((x << 16) | (x >> 16));        /* eor r1,r0,r0,ror #16  */
+        x = (x << 24) | (x >> 8);               /* mov r0,r0,ror #8      */
+        t &= ~0x00FF0000;                       /* bic r1,r1,#0x00FF0000 */
+        x ^= (t >> 8);                          /* eor r0,r0,r1,lsr #8   */
+
+        return x;
+}
+
+#define __arch__swab32(x) ___arch__swab32(x)
+
 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
 #  define __BYTEORDER_HAS_U64__
 #  define __SWAB_64_THRU_32__
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index e81baff4f54b..09e19a783a51 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -14,7 +14,6 @@
 #include <linux/sched.h>
 #include <linux/mm.h>
 
-#include <asm/mman.h>
 #include <asm/glue.h>
 #include <asm/shmparam.h>
 
diff --git a/include/asm-arm/dma.h b/include/asm-arm/dma.h
index ef41df43a584..49c01e2bf7c8 100644
--- a/include/asm-arm/dma.h
+++ b/include/asm-arm/dma.h
@@ -10,6 +10,13 @@ typedef unsigned int dmach_t;
 #include <asm/arch/dma.h>
 
 /*
+ * This is the maximum virtual address which can be DMA'd from.
+ */
+#ifndef MAX_DMA_ADDRESS
+#define MAX_DMA_ADDRESS 0xffffffff
+#endif
+
+/*
  * DMA modes
  */
 typedef unsigned int dmamode_t;
@@ -91,7 +98,9 @@ extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg);
  * especially since some DMA architectures don't update the
  * DMA address immediately, but defer it to the enable_dma().
  */
-extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
+extern void __set_dma_addr(dmach_t channel, void *addr);
+#define set_dma_addr(channel, addr)                             \
+        __set_dma_addr(channel, bus_to_virt(addr))
 
 /* Set the DMA byte count for this channel
  *
diff --git a/include/asm-arm/hardware/amba.h b/include/asm-arm/hardware/amba.h
deleted file mode 100644
index 51e6e54b2aa1..000000000000
--- a/include/asm-arm/hardware/amba.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- *  linux/include/asm-arm/hardware/amba.h
- *
- *  Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef ASMARM_AMBA_H
-#define ASMARM_AMBA_H
-
-#define AMBA_NR_IRQS    2
-
-struct amba_device {
-        struct device           dev;
-        struct resource         res;
-        u64                     dma_mask;
-        unsigned int            periphid;
-        unsigned int            irq[AMBA_NR_IRQS];
-};
-
-struct amba_id {
-        unsigned int            id;
-        unsigned int            mask;
-        void                    *data;
-};
-
-struct amba_driver {
-        struct device_driver    drv;
-        int                     (*probe)(struct amba_device *, void *);
-        int                     (*remove)(struct amba_device *);
-        void                    (*shutdown)(struct amba_device *);
-        int                     (*suspend)(struct amba_device *, pm_message_t);
-        int                     (*resume)(struct amba_device *);
-        struct amba_id          *id_table;
-};
-
-#define amba_get_drvdata(d)     dev_get_drvdata(&d->dev)
-#define amba_set_drvdata(d,p)   dev_set_drvdata(&d->dev, p)
-
-int amba_driver_register(struct amba_driver *);
-void amba_driver_unregister(struct amba_driver *);
-int amba_device_register(struct amba_device *, struct resource *);
-void amba_device_unregister(struct amba_device *);
-struct amba_device *amba_find_device(const char *, struct device *, unsigned int, unsigned int);
-int amba_request_regions(struct amba_device *, const char *);
-void amba_release_regions(struct amba_device *);
-
-#define amba_config(d)  (((d)->periphid >> 24) & 0xff)
-#define amba_rev(d)     (((d)->periphid >> 20) & 0x0f)
-#define amba_manf(d)    (((d)->periphid >> 12) & 0xff)
-#define amba_part(d)    ((d)->periphid & 0xfff)
-
-#endif
diff --git a/include/asm-arm/hardware/amba_clcd.h b/include/asm-arm/hardware/amba_clcd.h
deleted file mode 100644
index 6b8d73dc1ab0..000000000000
--- a/include/asm-arm/hardware/amba_clcd.h
+++ /dev/null
@@ -1,271 +0,0 @@
-/*
- * linux/include/asm-arm/hardware/amba_clcd.h -- Integrator LCD panel.
- *
- * David A Rusling
- *
- * Copyright (C) 2001 ARM Limited
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file COPYING in the main directory of this archive
- * for more details.
- */
-#include <linux/config.h>
-#include <linux/fb.h>
-
-/*
- * CLCD Controller Internal Register addresses
- */
-#define CLCD_TIM0               0x00000000
-#define CLCD_TIM1               0x00000004
-#define CLCD_TIM2               0x00000008
-#define CLCD_TIM3               0x0000000c
-#define CLCD_UBAS               0x00000010
-#define CLCD_LBAS               0x00000014
-
-#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW)
-#define CLCD_IENB               0x00000018
-#define CLCD_CNTL               0x0000001c
-#else
-/*
- * Someone rearranged these two registers on the Versatile
- * platform...
- */
-#define CLCD_IENB               0x0000001c
-#define CLCD_CNTL               0x00000018
-#endif
-
-#define CLCD_STAT               0x00000020
-#define CLCD_INTR               0x00000024
-#define CLCD_UCUR               0x00000028
-#define CLCD_LCUR               0x0000002C
-#define CLCD_PALL               0x00000200
-#define CLCD_PALETTE            0x00000200
-
-#define TIM2_CLKSEL             (1 << 5)
-#define TIM2_IVS                (1 << 11)
-#define TIM2_IHS                (1 << 12)
-#define TIM2_IPC                (1 << 13)
-#define TIM2_IOE                (1 << 14)
-#define TIM2_BCD                (1 << 26)
-
-#define CNTL_LCDEN              (1 << 0)
-#define CNTL_LCDBPP1            (0 << 1)
-#define CNTL_LCDBPP2            (1 << 1)
-#define CNTL_LCDBPP4            (2 << 1)
-#define CNTL_LCDBPP8            (3 << 1)
-#define CNTL_LCDBPP16           (4 << 1)
-#define CNTL_LCDBPP24           (5 << 1)
-#define CNTL_LCDBW              (1 << 4)
-#define CNTL_LCDTFT             (1 << 5)
-#define CNTL_LCDMONO8           (1 << 6)
-#define CNTL_LCDDUAL            (1 << 7)
-#define CNTL_BGR                (1 << 8)
-#define CNTL_BEBO               (1 << 9)
-#define CNTL_BEPO               (1 << 10)
-#define CNTL_LCDPWR             (1 << 11)
-#define CNTL_LCDVCOMP(x)        ((x) << 12)
-#define CNTL_LDMAFIFOTIME       (1 << 15)
-#define CNTL_WATERMARK          (1 << 16)
-
-struct clcd_panel {
-        struct fb_videomode     mode;
-        signed short            width;  /* width in mm */
-        signed short            height; /* height in mm */
-        u32                     tim2;
-        u32                     tim3;
-        u32                     cntl;
-        unsigned int            bpp:8,
-                                fixedtimings:1,
-                                grayscale:1;
-        unsigned int            connector;
-};
-
-struct clcd_regs {
-        u32                     tim0;
-        u32                     tim1;
-        u32                     tim2;
-        u32                     tim3;
-        u32                     cntl;
-        unsigned long           pixclock;
-};
-
-struct clcd_fb;
-
-/*
- * the board-type specific routines
- */
-struct clcd_board {
-        const char *name;
-
-        /*
-         * Optional.  Check whether the var structure is acceptable
-         * for this display.
-         */
-        int     (*check)(struct clcd_fb *fb, struct fb_var_screeninfo *var);
-
-        /*
-         * Compulsary.  Decode fb->fb.var into regs->*.  In the case of
-         * fixed timing, set regs->* to the register values required.
-         */
-        void    (*decode)(struct clcd_fb *fb, struct clcd_regs *regs);
-
-        /*
-         * Optional.  Disable any extra display hardware.
-         */
-        void    (*disable)(struct clcd_fb *);
-
-        /*
-         * Optional.  Enable any extra display hardware.
-         */
-        void    (*enable)(struct clcd_fb *);
-
-        /*
-         * Setup platform specific parts of CLCD driver
-         */
-        int     (*setup)(struct clcd_fb *);
-
-        /*
-         * mmap the framebuffer memory
-         */
-        int     (*mmap)(struct clcd_fb *, struct vm_area_struct *);
-
-        /*
-         * Remove platform specific parts of CLCD driver
-         */
-        void    (*remove)(struct clcd_fb *);
-};
-
-struct amba_device;
-struct clk;
-
-/* this data structure describes each frame buffer device we find */
-struct clcd_fb {
-        struct fb_info          fb;
-        struct amba_device      *dev;
-        struct clk              *clk;
-        struct clcd_panel       *panel;
-        struct clcd_board       *board;
-        void                    *board_data;
-        void __iomem            *regs;
-        u32                     clcd_cntl;
-        u32                     cmap[16];
-};
-
-static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
-{
-        u32 val, cpl;
-
-        /*
-         * Program the CLCD controller registers and start the CLCD
-         */
-        val = ((fb->fb.var.xres / 16) - 1) << 2;
-        val |= (fb->fb.var.hsync_len - 1) << 8;
-        val |= (fb->fb.var.right_margin - 1) << 16;
-        val |= (fb->fb.var.left_margin - 1) << 24;
-        regs->tim0 = val;
-
-        val = fb->fb.var.yres;
-        if (fb->panel->cntl & CNTL_LCDDUAL)
-                val /= 2;
-        val -= 1;
-        val |= (fb->fb.var.vsync_len - 1) << 10;
-        val |= fb->fb.var.lower_margin << 16;
-        val |= fb->fb.var.upper_margin << 24;
-        regs->tim1 = val;
-
-        val = fb->panel->tim2;
-        val |= fb->fb.var.sync & FB_SYNC_HOR_HIGH_ACT  ? 0 : TIM2_IHS;
-        val |= fb->fb.var.sync & FB_SYNC_VERT_HIGH_ACT ? 0 : TIM2_IVS;
-
-        cpl = fb->fb.var.xres_virtual;
-        if (fb->panel->cntl & CNTL_LCDTFT)        /* TFT */
-                /* / 1 */;
-        else if (!fb->fb.var.grayscale)           /* STN color */
-                cpl = cpl * 8 / 3;
-        else if (fb->panel->cntl & CNTL_LCDMONO8) /* STN monochrome, 8bit */
-                cpl /= 8;
-        else                                      /* STN monochrome, 4bit */
-                cpl /= 4;
-
-        regs->tim2 = val | ((cpl - 1) << 16);
-
-        regs->tim3 = fb->panel->tim3;
-
-        val = fb->panel->cntl;
-        if (fb->fb.var.grayscale)
-                val |= CNTL_LCDBW;
-
-        switch (fb->fb.var.bits_per_pixel) {
-        case 1:
-                val |= CNTL_LCDBPP1;
-                break;
-        case 2:
-                val |= CNTL_LCDBPP2;
-                break;
-        case 4:
-                val |= CNTL_LCDBPP4;
-                break;
-        case 8:
-                val |= CNTL_LCDBPP8;
-                break;
-        case 16:
-                val |= CNTL_LCDBPP16;
-                break;
-        case 32:
-                val |= CNTL_LCDBPP24;
-                break;
-        }
-
-        regs->cntl = val;
-        regs->pixclock = fb->fb.var.pixclock;
-}
-
-static inline int clcdfb_check(struct clcd_fb *fb, struct fb_var_screeninfo *var)
-{
-        var->xres_virtual = var->xres = (var->xres + 15) & ~15;
-        var->yres_virtual = var->yres = (var->yres + 1) & ~1;
-
-#define CHECK(e,l,h) (var->e < l || var->e > h)
-        if (CHECK(right_margin, (5+1), 256) ||  /* back porch */
-            CHECK(left_margin, (5+1), 256) ||   /* front porch */
-            CHECK(hsync_len, (5+1), 256) ||
-            var->xres > 4096 ||
-            var->lower_margin > 255 ||          /* back porch */
-            var->upper_margin > 255 ||          /* front porch */
-            var->vsync_len > 32 ||
-            var->yres > 1024)
-                return -EINVAL;
-#undef CHECK
-
-        /* single panel mode: PCD = max(PCD, 1) */
-        /* dual panel mode: PCD = max(PCD, 5) */
-
-        /*
-         * You can't change the grayscale setting, and
-         * we can only do non-interlaced video.
-         */
-        if (var->grayscale != fb->fb.var.grayscale ||
-            (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED)
-                return -EINVAL;
-
-#define CHECK(e) (var->e != fb->fb.var.e)
-        if (fb->panel->fixedtimings &&
-            (CHECK(xres)                ||
-             CHECK(yres)                ||
-             CHECK(bits_per_pixel)      ||
-             CHECK(pixclock)            ||
-             CHECK(left_margin)         ||
-             CHECK(right_margin)        ||
-             CHECK(upper_margin)        ||
-             CHECK(lower_margin)        ||
-             CHECK(hsync_len)           ||
-             CHECK(vsync_len)           ||
-             CHECK(sync)))
-                return -EINVAL;
-#undef CHECK
-
-        var->nonstd = 0;
-        var->accel_flags = 0;
-
-        return 0;
-}
diff --git a/include/asm-arm/hardware/amba_kmi.h b/include/asm-arm/hardware/amba_kmi.h
deleted file mode 100644
index a39e5be751b3..000000000000
--- a/include/asm-arm/hardware/amba_kmi.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- *  linux/include/asm-arm/hardware/amba_kmi.h
- *
- *  Internal header file for AMBA KMI ports
- *
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- *
- * ---------------------------------------------------------------------------
- *  From ARM PrimeCell(tm) PS2 Keyboard/Mouse Interface (PL050) Technical
- *  Reference Manual - ARM DDI 0143B - see http://www.arm.com/
- * ---------------------------------------------------------------------------
- */
-#ifndef ASM_ARM_HARDWARE_AMBA_KMI_H
-#define ASM_ARM_HARDWARE_AMBA_KMI_H
-
-/*
- * KMI control register:
- *  KMICR_TYPE       0 = PS2/AT mode, 1 = No line control bit mode
- *  KMICR_RXINTREN   1 = enable RX interrupts
- *  KMICR_TXINTREN   1 = enable TX interrupts
- *  KMICR_EN         1 = enable KMI
- *  KMICR_FD         1 = force KMI data low
- *  KMICR_FC         1 = force KMI clock low
- */
-#define KMICR           (KMI_BASE + 0x00)
-#define KMICR_TYPE              (1 << 5)
-#define KMICR_RXINTREN          (1 << 4)
-#define KMICR_TXINTREN          (1 << 3)
-#define KMICR_EN                (1 << 2)
-#define KMICR_FD                (1 << 1)
-#define KMICR_FC                (1 << 0)
-
-/*
- * KMI status register:
- *  KMISTAT_TXEMPTY  1 = transmitter register empty
- *  KMISTAT_TXBUSY   1 = currently sending data
- *  KMISTAT_RXFULL   1 = receiver register ready to be read
- *  KMISTAT_RXBUSY   1 = currently receiving data
- *  KMISTAT_RXPARITY parity of last databyte received
- *  KMISTAT_IC       current level of KMI clock input
- *  KMISTAT_ID       current level of KMI data input
- */
-#define KMISTAT         (KMI_BASE + 0x04)
-#define KMISTAT_TXEMPTY         (1 << 6)
-#define KMISTAT_TXBUSY          (1 << 5)
-#define KMISTAT_RXFULL          (1 << 4)
-#define KMISTAT_RXBUSY          (1 << 3)
-#define KMISTAT_RXPARITY        (1 << 2)
-#define KMISTAT_IC              (1 << 1)
-#define KMISTAT_ID              (1 << 0)
-
-/*
- * KMI data register
- */
-#define KMIDATA         (KMI_BASE + 0x08)
-
-/*
- * KMI clock divisor: to generate 8MHz internal clock
- *  div = (ref / 8MHz) - 1; 0 <= div <= 15
- */
-#define KMICLKDIV       (KMI_BASE + 0x0c)
-
-/*
- * KMI interrupt register:
- *  KMIIR_TXINTR     1 = transmit interrupt asserted
- *  KMIIR_RXINTR     1 = receive interrupt asserted
- */
-#define KMIIR           (KMI_BASE + 0x10)
-#define KMIIR_TXINTR            (1 << 1)
-#define KMIIR_RXINTR            (1 << 0)
-
-/*
- * The size of the KMI primecell
- */
-#define KMI_SIZE        (0x100)
-
-#endif
diff --git a/include/asm-arm/hardware/amba_serial.h b/include/asm-arm/hardware/amba_serial.h
deleted file mode 100644
index dc726ffccebd..000000000000
--- a/include/asm-arm/hardware/amba_serial.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
- *  linux/include/asm-arm/hardware/serial_amba.h
- *
- *  Internal header file for AMBA serial ports
- *
- *  Copyright (C) ARM Limited
- *  Copyright (C) 2000 Deep Blue Solutions Ltd.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-#ifndef ASM_ARM_HARDWARE_SERIAL_AMBA_H
-#define ASM_ARM_HARDWARE_SERIAL_AMBA_H
-
-/* -------------------------------------------------------------------------------
- *  From AMBA UART (PL010) Block Specification
- * -------------------------------------------------------------------------------
- *  UART Register Offsets.
- */
-#define UART01x_DR              0x00    /* Data read or written from the interface. */
-#define UART01x_RSR             0x04    /* Receive status register (Read). */
-#define UART01x_ECR             0x04    /* Error clear register (Write). */
-#define UART010_LCRH            0x08    /* Line control register, high byte. */
-#define UART010_LCRM            0x0C    /* Line control register, middle byte. */
-#define UART010_LCRL            0x10    /* Line control register, low byte. */
-#define UART010_CR              0x14    /* Control register. */
-#define UART01x_FR              0x18    /* Flag register (Read only). */
-#define UART010_IIR             0x1C    /* Interrupt indentification register (Read). */
-#define UART010_ICR             0x1C    /* Interrupt clear register (Write). */
-#define UART01x_ILPR            0x20    /* IrDA low power counter register. */
-#define UART011_IBRD            0x24    /* Integer baud rate divisor register. */
-#define UART011_FBRD            0x28    /* Fractional baud rate divisor register. */
-#define UART011_LCRH            0x2c    /* Line control register. */
-#define UART011_CR              0x30    /* Control register. */
-#define UART011_IFLS            0x34    /* Interrupt fifo level select. */
-#define UART011_IMSC            0x38    /* Interrupt mask. */
-#define UART011_RIS             0x3c    /* Raw interrupt status. */
-#define UART011_MIS             0x40    /* Masked interrupt status. */
-#define UART011_ICR             0x44    /* Interrupt clear register. */
-#define UART011_DMACR           0x48    /* DMA control register. */
-
-#define UART011_DR_OE           (1 << 11)
-#define UART011_DR_BE           (1 << 10)
-#define UART011_DR_PE           (1 << 9)
-#define UART011_DR_FE           (1 << 8)
-
-#define UART01x_RSR_OE          0x08
-#define UART01x_RSR_BE          0x04
-#define UART01x_RSR_PE          0x02
-#define UART01x_RSR_FE          0x01
-
-#define UART011_FR_RI           0x100
-#define UART011_FR_TXFE         0x080
-#define UART011_FR_RXFF         0x040
-#define UART01x_FR_TXFF         0x020
-#define UART01x_FR_RXFE         0x010
-#define UART01x_FR_BUSY         0x008
-#define UART01x_FR_DCD          0x004
-#define UART01x_FR_DSR          0x002
-#define UART01x_FR_CTS          0x001
-#define UART01x_FR_TMSK         (UART01x_FR_TXFF + UART01x_FR_BUSY)
-
-#define UART011_CR_CTSEN        0x8000  /* CTS hardware flow control */
-#define UART011_CR_RTSEN        0x4000  /* RTS hardware flow control */
-#define UART011_CR_OUT2         0x2000  /* OUT2 */
-#define UART011_CR_OUT1         0x1000  /* OUT1 */
-#define UART011_CR_RTS          0x0800  /* RTS */
-#define UART011_CR_DTR          0x0400  /* DTR */
-#define UART011_CR_RXE          0x0200  /* receive enable */
-#define UART011_CR_TXE          0x0100  /* transmit enable */
-#define UART011_CR_LBE          0x0080  /* loopback enable */
-#define UART010_CR_RTIE         0x0040
-#define UART010_CR_TIE          0x0020
-#define UART010_CR_RIE          0x0010
-#define UART010_CR_MSIE         0x0008
-#define UART01x_CR_IIRLP        0x0004  /* SIR low power mode */
-#define UART01x_CR_SIREN        0x0002  /* SIR enable */
-#define UART01x_CR_UARTEN       0x0001  /* UART enable */
- 
-#define UART011_LCRH_SPS        0x80
-#define UART01x_LCRH_WLEN_8     0x60
-#define UART01x_LCRH_WLEN_7     0x40
-#define UART01x_LCRH_WLEN_6     0x20
-#define UART01x_LCRH_WLEN_5     0x00
-#define UART01x_LCRH_FEN        0x10
-#define UART01x_LCRH_STP2       0x08
-#define UART01x_LCRH_EPS        0x04
-#define UART01x_LCRH_PEN        0x02
-#define UART01x_LCRH_BRK        0x01
-
-#define UART010_IIR_RTIS        0x08
-#define UART010_IIR_TIS         0x04
-#define UART010_IIR_RIS         0x02
-#define UART010_IIR_MIS         0x01
-
-#define UART011_IFLS_RX1_8      (0 << 3)
-#define UART011_IFLS_RX2_8      (1 << 3)
-#define UART011_IFLS_RX4_8      (2 << 3)
-#define UART011_IFLS_RX6_8      (3 << 3)
-#define UART011_IFLS_RX7_8      (4 << 3)
-#define UART011_IFLS_TX1_8      (0 << 0)
-#define UART011_IFLS_TX2_8      (1 << 0)
-#define UART011_IFLS_TX4_8      (2 << 0)
-#define UART011_IFLS_TX6_8      (3 << 0)
-#define UART011_IFLS_TX7_8      (4 << 0)
-
-#define UART011_OEIM            (1 << 10)       /* overrun error interrupt mask */
-#define UART011_BEIM            (1 << 9)        /* break error interrupt mask */
-#define UART011_PEIM            (1 << 8)        /* parity error interrupt mask */
-#define UART011_FEIM            (1 << 7)        /* framing error interrupt mask */
-#define UART011_RTIM            (1 << 6)        /* receive timeout interrupt mask */
-#define UART011_TXIM            (1 << 5)        /* transmit interrupt mask */
-#define UART011_RXIM            (1 << 4)        /* receive interrupt mask */
-#define UART011_DSRMIM          (1 << 3)        /* DSR interrupt mask */
-#define UART011_DCDMIM          (1 << 2)        /* DCD interrupt mask */
-#define UART011_CTSMIM          (1 << 1)        /* CTS interrupt mask */
-#define UART011_RIMIM           (1 << 0)        /* RI interrupt mask */
-
-#define UART011_OEIS            (1 << 10)       /* overrun error interrupt status */
-#define UART011_BEIS            (1 << 9)        /* break error interrupt status */
-#define UART011_PEIS            (1 << 8)        /* parity error interrupt status */
-#define UART011_FEIS            (1 << 7)        /* framing error interrupt status */
-#define UART011_RTIS            (1 << 6)        /* receive timeout interrupt status */
-#define UART011_TXIS            (1 << 5)        /* transmit interrupt status */
-#define UART011_RXIS            (1 << 4)        /* receive interrupt status */
-#define UART011_DSRMIS          (1 << 3)        /* DSR interrupt status */
-#define UART011_DCDMIS          (1 << 2)        /* DCD interrupt status */
-#define UART011_CTSMIS          (1 << 1)        /* CTS interrupt status */
-#define UART011_RIMIS           (1 << 0)        /* RI interrupt status */
-
-#define UART011_OEIC            (1 << 10)       /* overrun error interrupt clear */
-#define UART011_BEIC            (1 << 9)        /* break error interrupt clear */
-#define UART011_PEIC            (1 << 8)        /* parity error interrupt clear */
-#define UART011_FEIC            (1 << 7)        /* framing error interrupt clear */
-#define UART011_RTIC            (1 << 6)        /* receive timeout interrupt clear */
-#define UART011_TXIC            (1 << 5)        /* transmit interrupt clear */
-#define UART011_RXIC            (1 << 4)        /* receive interrupt clear */
-#define UART011_DSRMIC          (1 << 3)        /* DSR interrupt clear */
-#define UART011_DCDMIC          (1 << 2)        /* DCD interrupt clear */
-#define UART011_CTSMIC          (1 << 1)        /* CTS interrupt clear */
-#define UART011_RIMIC           (1 << 0)        /* RI interrupt clear */
-
-#define UART011_DMAONERR        (1 << 2)        /* disable dma on error */
-#define UART011_TXDMAE          (1 << 1)        /* enable transmit dma */
-#define UART011_RXDMAE          (1 << 0)        /* enable receive dma */
-
-#define UART01x_RSR_ANY         (UART01x_RSR_OE|UART01x_RSR_BE|UART01x_RSR_PE|UART01x_RSR_FE)
-#define UART01x_FR_MODEM_ANY    (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS)
-
-#endif
diff --git a/include/asm-arm/hardware/clock.h b/include/asm-arm/hardware/clock.h
deleted file mode 100644
index 19da861e523d..000000000000
--- a/include/asm-arm/hardware/clock.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- *  linux/include/asm-arm/hardware/clock.h
- *
- *  Copyright (C) 2004 ARM Limited.
- *  Written by Deep Blue Solutions Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef ASMARM_CLOCK_H
-#define ASMARM_CLOCK_H
-
-struct device;
-
-/*
- * The base API.
- */
-
-
-/*
- * struct clk - an machine class defined object / cookie.
- */
-struct clk;
-
-/**
- * clk_get - lookup and obtain a reference to a clock producer.
- * @dev: device for clock "consumer"
- * @id: clock comsumer ID
- *
- * Returns a struct clk corresponding to the clock producer, or
- * valid IS_ERR() condition containing errno.  The implementation
- * uses @dev and @id to determine the clock consumer, and thereby
- * the clock producer.  (IOW, @id may be identical strings, but
- * clk_get may return different clock producers depending on @dev.)
- */
-struct clk *clk_get(struct device *dev, const char *id);
-
-/**
- * clk_enable - inform the system when the clock source should be running.
- * @clk: clock source
- *
- * If the clock can not be enabled/disabled, this should return success.
- *
- * Returns success (0) or negative errno.
- */
-int clk_enable(struct clk *clk);
-
-/**
- * clk_disable - inform the system when the clock source is no longer required.
- * @clk: clock source
- */
-void clk_disable(struct clk *clk);
-
-/**
- * clk_use - increment the use count
- * @clk: clock source
- *
- * Returns success (0) or negative errno.
- */
-int clk_use(struct clk *clk);
-
-/**
- * clk_unuse - decrement the use count
- * @clk: clock source
- */
-void clk_unuse(struct clk *clk);
-
-/**
- * clk_get_rate - obtain the current clock rate (in Hz) for a clock source.
- *                This is only valid once the clock source has been enabled.
- * @clk: clock source
- */
-unsigned long clk_get_rate(struct clk *clk);
-
-/**
- * clk_put      - "free" the clock source
- * @clk: clock source
- */
-void clk_put(struct clk *clk);
-
-
-/*
- * The remaining APIs are optional for machine class support.
- */
-
-
-/**
- * clk_round_rate - adjust a rate to the exact rate a clock can provide
- * @clk: clock source
- * @rate: desired clock rate in Hz
- *
- * Returns rounded clock rate in Hz, or negative errno.
- */
-long clk_round_rate(struct clk *clk, unsigned long rate);
- 
-/**
- * clk_set_rate - set the clock rate for a clock source
- * @clk: clock source
- * @rate: desired clock rate in Hz
- *
- * Returns success (0) or negative errno.
- */
-int clk_set_rate(struct clk *clk, unsigned long rate);
- 
-/**
- * clk_set_parent - set the parent clock source for this clock
- * @clk: clock source
- * @parent: parent clock source
- *
- * Returns success (0) or negative errno.
- */
-int clk_set_parent(struct clk *clk, struct clk *parent);
-
-/**
- * clk_get_parent - get the parent clock source for this clock
- * @clk: clock source
- *
- * Returns struct clk corresponding to parent clock source, or
- * valid IS_ERR() condition containing errno.
- */
-struct clk *clk_get_parent(struct clk *clk);
-
-#endif
diff --git a/include/asm-arm/hardware/sharpsl_pm.h b/include/asm-arm/hardware/sharpsl_pm.h
new file mode 100644
index 000000000000..36983e5f3665
--- /dev/null
+++ b/include/asm-arm/hardware/sharpsl_pm.h
@@ -0,0 +1,94 @@
+/*
+ * SharpSL Battery/PM Driver
+ *
+ * Copyright (c) 2004-2005 Richard Purdie
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/interrupt.h>
+
+struct sharpsl_charger_machinfo {
+        void (*init)(void);
+        void (*exit)(void);
+        int gpio_acin;
+        int gpio_batfull;
+        int gpio_batlock;
+        int gpio_fatal;
+        void (*discharge)(int);
+        void (*discharge1)(int);
+        void (*charge)(int);
+        void (*measure_temp)(int);
+        void (*presuspend)(void);
+        void (*postsuspend)(void);
+        unsigned long (*read_devdata)(int);
+#define SHARPSL_BATT_VOLT       1
+#define SHARPSL_BATT_TEMP       2
+#define SHARPSL_ACIN_VOLT       3
+#define SHARPSL_STATUS_ACIN     4
+#define SHARPSL_STATUS_LOCK     5
+#define SHARPSL_STATUS_CHRGFULL 6
+#define SHARPSL_STATUS_FATAL    7
+        unsigned long (*charger_wakeup)(void);
+        int (*should_wakeup)(unsigned int resume_on_alarm);
+        int bat_levels;
+        struct battery_thresh *bat_levels_noac;
+        struct battery_thresh *bat_levels_acin;
+        int status_high_acin;
+        int status_low_acin;
+        int status_high_noac;
+        int status_low_noac;
+};
+
+struct battery_thresh {
+        int voltage;
+        int percentage;
+};
+
+struct battery_stat {
+        int ac_status;         /* APM AC Present/Not Present */
+        int mainbat_status;    /* APM Main Battery Status */
+        int mainbat_percent;   /* Main Battery Percentage Charge */
+        int mainbat_voltage;   /* Main Battery Voltage */
+};
+
+struct sharpsl_pm_status {
+        struct device *dev;
+        struct timer_list ac_timer;
+        struct timer_list chrg_full_timer;
+
+        int charge_mode;
+#define CHRG_ERROR    (-1)
+#define CHRG_OFF      (0)
+#define CHRG_ON       (1)
+#define CHRG_DONE     (2)
+
+        unsigned int flags;
+#define SHARPSL_SUSPENDED       (1 << 0)  /* Device is Suspended */
+#define SHARPSL_ALARM_ACTIVE    (1 << 1)  /* Alarm is for charging event (not user) */
+#define SHARPSL_BL_LIMIT        (1 << 2)  /* Backlight Intensity Limited */
+#define SHARPSL_APM_QUEUED      (1 << 3)  /* APM Event Queued */
+#define SHARPSL_DO_OFFLINE_CHRG (1 << 4)  /* Trigger the offline charger */
+
+        int full_count;
+        unsigned long charge_start_time;
+        struct sharpsl_charger_machinfo *machinfo;
+        struct battery_stat battstat;
+};
+
+extern struct sharpsl_pm_status sharpsl_pm;
+
+
+#define SHARPSL_LED_ERROR  2
+#define SHARPSL_LED_ON     1
+#define SHARPSL_LED_OFF    0
+
+void sharpsl_battery_kick(void);
+void sharpsl_pm_led(int val);
+irqreturn_t sharpsl_ac_isr(int irq, void *dev_id, struct pt_regs *fp);
+irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id, struct pt_regs *fp);
+irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id, struct pt_regs *fp);
+
diff --git a/include/asm-arm/mach/dma.h b/include/asm-arm/mach/dma.h
index 31bf716106ee..e7c4a20aad53 100644
--- a/include/asm-arm/mach/dma.h
+++ b/include/asm-arm/mach/dma.h
@@ -25,13 +25,15 @@ struct dma_ops {
 };
 
 struct dma_struct {
+        void            *addr;          /* single DMA address           */
+        unsigned long   count;          /* single DMA size              */
         struct scatterlist buf;         /* single DMA                   */
         int             sgcount;        /* number of DMA SG             */
         struct scatterlist *sg;         /* DMA Scatter-Gather List      */
 
         unsigned int    active:1;       /* Transfer active              */
         unsigned int    invalid:1;      /* Address/Count changed        */
-        unsigned int    using_sg:1;     /* using scatter list?          */
+
         dmamode_t       dma_mode;       /* DMA mode                     */
         int             speed;          /* DMA speed                    */
 
diff --git a/include/asm-arm/scatterlist.h b/include/asm-arm/scatterlist.h
index 83b876fb04cc..de2f65eb42ed 100644
--- a/include/asm-arm/scatterlist.h
+++ b/include/asm-arm/scatterlist.h
@@ -9,7 +9,6 @@ struct scatterlist {
         unsigned int    offset;         /* buffer offset                 */
         dma_addr_t      dma_address;    /* dma address                   */
         unsigned int    length;         /* length                        */
-        char            *__address;     /* for set_dma_addr              */
 };
 
 /*