Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial

* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (79 commits)
  Jesper Juhl is the new trivial patches maintainer
  Documentation: mention email-clients.txt in SubmittingPatches
  fs/binfmt_elf.c: spello fix
  do_invalidatepage() comment typo fix
  Documentation/filesystems/porting fixes
  typo fixes in net/core/net_namespace.c
  typo fix in net/rfkill/rfkill.c
  typo fixes in net/sctp/sm_statefuns.c
  lib/: Spelling fixes
  kernel/: Spelling fixes
  include/scsi/: Spelling fixes
  include/linux/: Spelling fixes
  include/asm-m68knommu/: Spelling fixes
  include/asm-frv/: Spelling fixes
  fs/: Spelling fixes
  drivers/watchdog/: Spelling fixes
  drivers/video/: Spelling fixes
  drivers/ssb/: Spelling fixes
  drivers/serial/: Spelling fixes
  drivers/scsi/: Spelling fixes
  ...

5 files changed, 38 insertions, 38 deletions

diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
index 5d949d763a91..1205c28a2078 100644
--- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
@@ -587,23 +587,23 @@
 #define UICR1_IM14      (1 << 6)        /* Interrupt mask ep 14 */
 #define UICR1_IM15      (1 << 7)        /* Interrupt mask ep 15 */
 
-#define USIR0_IR0       (1 << 0)        /* Interrup request ep 0 */
-#define USIR0_IR1       (1 << 1)        /* Interrup request ep 1 */
-#define USIR0_IR2       (1 << 2)        /* Interrup request ep 2 */
-#define USIR0_IR3       (1 << 3)        /* Interrup request ep 3 */
-#define USIR0_IR4       (1 << 4)        /* Interrup request ep 4 */
-#define USIR0_IR5       (1 << 5)        /* Interrup request ep 5 */
-#define USIR0_IR6       (1 << 6)        /* Interrup request ep 6 */
-#define USIR0_IR7       (1 << 7)        /* Interrup request ep 7 */
-
-#define USIR1_IR8       (1 << 0)        /* Interrup request ep 8 */
-#define USIR1_IR9       (1 << 1)        /* Interrup request ep 9 */
-#define USIR1_IR10      (1 << 2)        /* Interrup request ep 10 */
-#define USIR1_IR11      (1 << 3)        /* Interrup request ep 11 */
-#define USIR1_IR12      (1 << 4)        /* Interrup request ep 12 */
-#define USIR1_IR13      (1 << 5)        /* Interrup request ep 13 */
-#define USIR1_IR14      (1 << 6)        /* Interrup request ep 14 */
-#define USIR1_IR15      (1 << 7)        /* Interrup request ep 15 */
+#define USIR0_IR0       (1 << 0)        /* Interrupt request ep 0 */
+#define USIR0_IR1       (1 << 1)        /* Interrupt request ep 1 */
+#define USIR0_IR2       (1 << 2)        /* Interrupt request ep 2 */
+#define USIR0_IR3       (1 << 3)        /* Interrupt request ep 3 */
+#define USIR0_IR4       (1 << 4)        /* Interrupt request ep 4 */
+#define USIR0_IR5       (1 << 5)        /* Interrupt request ep 5 */
+#define USIR0_IR6       (1 << 6)        /* Interrupt request ep 6 */
+#define USIR0_IR7       (1 << 7)        /* Interrupt request ep 7 */
+
+#define USIR1_IR8       (1 << 0)        /* Interrupt request ep 8 */
+#define USIR1_IR9       (1 << 1)        /* Interrupt request ep 9 */
+#define USIR1_IR10      (1 << 2)        /* Interrupt request ep 10 */
+#define USIR1_IR11      (1 << 3)        /* Interrupt request ep 11 */
+#define USIR1_IR12      (1 << 4)        /* Interrupt request ep 12 */
+#define USIR1_IR13      (1 << 5)        /* Interrupt request ep 13 */
+#define USIR1_IR14      (1 << 6)        /* Interrupt request ep 14 */
+#define USIR1_IR15      (1 << 7)        /* Interrupt request ep 15 */
 
 #define DCMD_LENGTH     0x01fff         /* length mask (max = 8K - 1) */
 
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 442494d71f12..16ed24dbda4e 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -737,25 +737,25 @@
 
 #define USIR0           __REG(0x40600058)  /* UDC Status Interrupt Register 0 */
 
-#define USIR0_IR0       (1 << 0)        /* Interrup request ep 0 */
-#define USIR0_IR1       (1 << 1)        /* Interrup request ep 1 */
-#define USIR0_IR2       (1 << 2)        /* Interrup request ep 2 */
-#define USIR0_IR3       (1 << 3)        /* Interrup request ep 3 */
-#define USIR0_IR4       (1 << 4)        /* Interrup request ep 4 */
-#define USIR0_IR5       (1 << 5)        /* Interrup request ep 5 */
-#define USIR0_IR6       (1 << 6)        /* Interrup request ep 6 */
-#define USIR0_IR7       (1 << 7)        /* Interrup request ep 7 */
+#define USIR0_IR0       (1 << 0)        /* Interrupt request ep 0 */
+#define USIR0_IR1       (1 << 1)        /* Interrupt request ep 1 */
+#define USIR0_IR2       (1 << 2)        /* Interrupt request ep 2 */
+#define USIR0_IR3       (1 << 3)        /* Interrupt request ep 3 */
+#define USIR0_IR4       (1 << 4)        /* Interrupt request ep 4 */
+#define USIR0_IR5       (1 << 5)        /* Interrupt request ep 5 */
+#define USIR0_IR6       (1 << 6)        /* Interrupt request ep 6 */
+#define USIR0_IR7       (1 << 7)        /* Interrupt request ep 7 */
 
 #define USIR1           __REG(0x4060005C)  /* UDC Status Interrupt Register 1 */
 
-#define USIR1_IR8       (1 << 0)        /* Interrup request ep 8 */
-#define USIR1_IR9       (1 << 1)        /* Interrup request ep 9 */
-#define USIR1_IR10      (1 << 2)        /* Interrup request ep 10 */
-#define USIR1_IR11      (1 << 3)        /* Interrup request ep 11 */
-#define USIR1_IR12      (1 << 4)        /* Interrup request ep 12 */
-#define USIR1_IR13      (1 << 5)        /* Interrup request ep 13 */
-#define USIR1_IR14      (1 << 6)        /* Interrup request ep 14 */
-#define USIR1_IR15      (1 << 7)        /* Interrup request ep 15 */
+#define USIR1_IR8       (1 << 0)        /* Interrupt request ep 8 */
+#define USIR1_IR9       (1 << 1)        /* Interrupt request ep 9 */
+#define USIR1_IR10      (1 << 2)        /* Interrupt request ep 10 */
+#define USIR1_IR11      (1 << 3)        /* Interrupt request ep 11 */
+#define USIR1_IR12      (1 << 4)        /* Interrupt request ep 12 */
+#define USIR1_IR13      (1 << 5)        /* Interrupt request ep 13 */
+#define USIR1_IR14      (1 << 6)        /* Interrupt request ep 14 */
+#define USIR1_IR15      (1 << 7)        /* Interrupt request ep 15 */
 
 #elif defined(CONFIG_PXA27x)
 
@@ -1020,7 +1020,7 @@
 #define ICSR0           __REG(0x40800014)  /* ICP Status Register 0 */
 #define ICSR1           __REG(0x40800018)  /* ICP Status Register 1 */
 
-#define ICCR0_AME       (1 << 7)        /* Adress match enable */
+#define ICCR0_AME       (1 << 7)        /* Address match enable */
 #define ICCR0_TIE       (1 << 6)        /* Transmit FIFO interrupt enable */
 #define ICCR0_RIE       (1 << 5)        /* Recieve FIFO interrupt enable */
 #define ICCR0_RXE       (1 << 4)        /* Receive enable */
diff --git a/include/asm-arm/arch-versatile/irqs.h b/include/asm-arm/arch-versatile/irqs.h
index 745aa841b31a..f7263b99403b 100644
--- a/include/asm-arm/arch-versatile/irqs.h
+++ b/include/asm-arm/arch-versatile/irqs.h
@@ -22,7 +22,7 @@
 #include <asm/arch/platform.h>
 
 /* 
- *  IRQ interrupts definitions are the same the INT definitions
+ *  IRQ interrupts definitions are the same as the INT definitions
  *  held within platform.h
  */
 #define IRQ_VIC_START           0
@@ -94,7 +94,7 @@
 #define IRQMASK_VICSOURCE31     INTMASK_VICSOURCE31
 
 /* 
- *  FIQ interrupts definitions are the same the INT definitions.
+ *  FIQ interrupts definitions are the same as the INT definitions.
  */
 #define FIQ_WDOGINT             INT_WDOGINT
 #define FIQ_SOFTINT             INT_SOFTINT
diff --git a/include/asm-arm/hardware/it8152.h b/include/asm-arm/hardware/it8152.h
index aaebb61aca48..74b5fff7f575 100644
--- a/include/asm-arm/hardware/it8152.h
+++ b/include/asm-arm/hardware/it8152.h
@@ -42,7 +42,7 @@ extern unsigned long it8152_base_address;
 #define IT8152_GPIO_GPDR                __REG_IT8152(0x3f00500)
 
 /*
-  Interrup contoler per register summary:
+  Interrupt controller per register summary:
   ---------------------------------------
   LCDNIRR:
   IT8152_LD_IRQ(8) PCICLK stop
diff --git a/include/asm-arm/mach/udc_pxa2xx.h b/include/asm-arm/mach/udc_pxa2xx.h
index f191e147ea90..f9f3606986c2 100644
--- a/include/asm-arm/mach/udc_pxa2xx.h
+++ b/include/asm-arm/mach/udc_pxa2xx.h
@@ -16,7 +16,7 @@ struct pxa2xx_udc_mach_info {
 #define PXA2XX_UDC_CMD_DISCONNECT       1       /* so host won't see us */
 
         /* Boards following the design guidelines in the developer's manual,
-         * with on-chip GPIOs not Lubbock's wierd hardware, can have a sane
+         * with on-chip GPIOs not Lubbock's weird hardware, can have a sane
          * VBUS IRQ and omit the methods above.  Store the GPIO number
          * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits.
          * Note that sometimes the signals go through inverters...