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authorNicolas Pitre <nico@cam.org>2005-09-08 18:07:40 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-09-08 18:07:40 -0400
commit61c8c158c828073cfebf11ca8e340727feafa038 (patch)
tree0cc1d9e29d6c799b91802938e4ec054f9082d08b /include/asm-arm
parent0dffefbf1a26ee0661d47516420d86b485a08e9c (diff)
[ARM] 2892/1: remove gcc workaround for direct access to absolute memory addresses
Patch from Nicolas Pitre It used to make a difference in the gcc-2.95 era. However these days modern gcc apparently got better at not being influenced by such constructs (which is good in general) and therefore such workaround is of no real advantage anymore. The good news is that gcc (from version 4.1.0) is now fixed with regards to the defficiency this workaround was trying to address. For those interested the patch can easily be backported to older gcc versions and can be found here: http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?r1=1.476&r2=1.478 and also here: http://savannah.gnu.org/cgi-bin/viewcvs/gcc/gcc/gcc/config/arm/arm.c.diff?r1=text&tr1=1.476&r2=text&tr2=1.478&diff_format=u Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-pxa/hardware.h18
-rw-r--r--include/asm-arm/arch-sa1100/hardware.h18
2 files changed, 5 insertions, 31 deletions
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index 72b04d846a23..cf35721cfa45 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -44,24 +44,12 @@
44 44
45#ifndef __ASSEMBLY__ 45#ifndef __ASSEMBLY__
46 46
47#if 0 47# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
48# define __REG(x) (*((volatile u32 *)io_p2v(x)))
49#else
50/*
51 * This __REG() version gives the same results as the one above, except
52 * that we are fooling gcc somehow so it generates far better and smaller
53 * assembly code for access to contigous registers. It's a shame that gcc
54 * doesn't guess this by itself.
55 */
56#include <asm/types.h>
57typedef struct { volatile u32 offset[4096]; } __regbase;
58# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
59# define __REG(x) __REGP(io_p2v(x))
60#endif
61 48
62/* With indexed regs we don't want to feed the index through io_p2v() 49/* With indexed regs we don't want to feed the index through io_p2v()
63 especially if it is a variable, otherwise horrible code will result. */ 50 especially if it is a variable, otherwise horrible code will result. */
64# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) 51# define __REG2(x,y) \
52 (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
65 53
66# define __PREG(x) (io_v2p((u32)&(x))) 54# define __PREG(x) (io_v2p((u32)&(x)))
67 55
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 10c62db34362..19c3b1e186bb 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -49,23 +49,9 @@
49 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) 49 ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
50 50
51#ifndef __ASSEMBLY__ 51#ifndef __ASSEMBLY__
52#include <asm/types.h>
53 52
54#if 0 53# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
55# define __REG(x) (*((volatile u32 *)io_p2v(x))) 54# define __PREG(x) (io_v2p((unsigned long)&(x)))
56#else
57/*
58 * This __REG() version gives the same results as the one above, except
59 * that we are fooling gcc somehow so it generates far better and smaller
60 * assembly code for access to contigous registers. It's a shame that gcc
61 * doesn't guess this by itself.
62 */
63typedef struct { volatile u32 offset[4096]; } __regbase;
64# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
65# define __REG(x) __REGP(io_p2v(x))
66#endif
67
68# define __PREG(x) (io_v2p((u32)&(x)))
69 55
70#else 56#else
71 57