diff options
author | Tony Lindgren <tony@atomide.com> | 2005-07-10 14:58:06 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-07-10 14:58:06 -0400 |
commit | af973d2aff6008bc7500277eb5a523db579731c6 (patch) | |
tree | 0aa876c1944eec95e882c2c6d4abec5a01c0f56c /include/asm-arm | |
parent | 8107338bf9d0367d0b3f42730906b83532b6786f (diff) |
[PATCH] ARM: 2797/1: OMAP update 1/11: Update include files
Patch from Tony Lindgren
This patch by various OMAP developers syncs the OMAP
specific include files with the linux-omap tree.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-omap/board-h2.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/board-h3.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/board-osk.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/board.h | 12 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/hardware.h | 24 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/irqs.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/omap16xx.h | 32 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/system.h | 21 |
8 files changed, 80 insertions, 27 deletions
diff --git a/include/asm-arm/arch-omap/board-h2.h b/include/asm-arm/arch-omap/board-h2.h index 60f002b72983..39ca5a31aeea 100644 --- a/include/asm-arm/arch-omap/board-h2.h +++ b/include/asm-arm/arch-omap/board-h2.h | |||
@@ -34,11 +34,6 @@ | |||
34 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ | 34 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ |
35 | #define OMAP1610_ETHR_START 0x04000300 | 35 | #define OMAP1610_ETHR_START 0x04000300 |
36 | 36 | ||
37 | /* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */ | ||
38 | #define OMAP_NOR_FLASH_SIZE SZ_32M | ||
39 | #define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */ | ||
40 | #define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */ | ||
41 | |||
42 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ | 37 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ |
43 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ | 38 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ |
44 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ | 39 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ |
diff --git a/include/asm-arm/arch-omap/board-h3.h b/include/asm-arm/arch-omap/board-h3.h index e4d1cd231731..1b12c1dcc2fa 100644 --- a/include/asm-arm/arch-omap/board-h3.h +++ b/include/asm-arm/arch-omap/board-h3.h | |||
@@ -30,11 +30,6 @@ | |||
30 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ | 30 | /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ |
31 | #define OMAP1710_ETHR_START 0x04000300 | 31 | #define OMAP1710_ETHR_START 0x04000300 |
32 | 32 | ||
33 | /* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */ | ||
34 | #define OMAP_NOR_FLASH_SIZE SZ_32M | ||
35 | #define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */ | ||
36 | #define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */ | ||
37 | |||
38 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ | 33 | /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ |
39 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ | 34 | #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ |
40 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ | 35 | #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ |
diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h index aaa49a0fbd21..2b1a8a4fe44e 100644 --- a/include/asm-arm/arch-omap/board-osk.h +++ b/include/asm-arm/arch-omap/board-osk.h | |||
@@ -32,10 +32,5 @@ | |||
32 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ | 32 | /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ |
33 | #define OMAP_OSK_ETHR_START 0x04800300 | 33 | #define OMAP_OSK_ETHR_START 0x04800300 |
34 | 34 | ||
35 | /* Micron NOR flash at CS3 mapped to address 0x0 if BM bit is 1 */ | ||
36 | #define OMAP_OSK_NOR_FLASH_BASE 0xD8000000 | ||
37 | #define OMAP_OSK_NOR_FLASH_SIZE SZ_32M | ||
38 | #define OMAP_OSK_NOR_FLASH_START 0x00000000 | ||
39 | |||
40 | #endif /* __ASM_ARCH_OMAP_OSK_H */ | 35 | #endif /* __ASM_ARCH_OMAP_OSK_H */ |
41 | 36 | ||
diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 1cefd60b6f2a..95bd625480c1 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h | |||
@@ -16,10 +16,11 @@ | |||
16 | /* Different peripheral ids */ | 16 | /* Different peripheral ids */ |
17 | #define OMAP_TAG_CLOCK 0x4f01 | 17 | #define OMAP_TAG_CLOCK 0x4f01 |
18 | #define OMAP_TAG_MMC 0x4f02 | 18 | #define OMAP_TAG_MMC 0x4f02 |
19 | #define OMAP_TAG_UART 0x4f03 | 19 | #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 |
20 | #define OMAP_TAG_USB 0x4f04 | 20 | #define OMAP_TAG_USB 0x4f04 |
21 | #define OMAP_TAG_LCD 0x4f05 | 21 | #define OMAP_TAG_LCD 0x4f05 |
22 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 | 22 | #define OMAP_TAG_GPIO_SWITCH 0x4f06 |
23 | #define OMAP_TAG_UART 0x4f07 | ||
23 | 24 | ||
24 | #define OMAP_TAG_BOOT_REASON 0x4f80 | 25 | #define OMAP_TAG_BOOT_REASON 0x4f80 |
25 | #define OMAP_TAG_FLASH_PART 0x4f81 | 26 | #define OMAP_TAG_FLASH_PART 0x4f81 |
@@ -35,7 +36,7 @@ struct omap_mmc_config { | |||
35 | s16 mmc1_switch_pin, mmc2_switch_pin; | 36 | s16 mmc1_switch_pin, mmc2_switch_pin; |
36 | }; | 37 | }; |
37 | 38 | ||
38 | struct omap_uart_config { | 39 | struct omap_serial_console_config { |
39 | u8 console_uart; | 40 | u8 console_uart; |
40 | u32 console_speed; | 41 | u32 console_speed; |
41 | }; | 42 | }; |
@@ -82,7 +83,8 @@ struct omap_lcd_config { | |||
82 | */ | 83 | */ |
83 | #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 | 84 | #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 |
84 | #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 | 85 | #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 |
85 | #define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 | 86 | #define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 |
87 | #define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002 | ||
86 | struct omap_gpio_switch_config { | 88 | struct omap_gpio_switch_config { |
87 | char name[12]; | 89 | char name[12]; |
88 | u16 gpio; | 90 | u16 gpio; |
@@ -99,6 +101,10 @@ struct omap_boot_reason_config { | |||
99 | char reason_str[12]; | 101 | char reason_str[12]; |
100 | }; | 102 | }; |
101 | 103 | ||
104 | struct omap_uart_config { | ||
105 | /* Bit field of UARTs present; bit 0 --> UART1 */ | ||
106 | unsigned int enabled_uarts; | ||
107 | }; | ||
102 | 108 | ||
103 | struct omap_board_config_entry { | 109 | struct omap_board_config_entry { |
104 | u16 tag; | 110 | u16 tag; |
diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index 37e06c782bdf..48258c7f6541 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h | |||
@@ -54,6 +54,19 @@ | |||
54 | 54 | ||
55 | /* | 55 | /* |
56 | * ---------------------------------------------------------------------------- | 56 | * ---------------------------------------------------------------------------- |
57 | * Timers | ||
58 | * ---------------------------------------------------------------------------- | ||
59 | */ | ||
60 | #define OMAP_MPU_TIMER1_BASE (0xfffec500) | ||
61 | #define OMAP_MPU_TIMER2_BASE (0xfffec600) | ||
62 | #define OMAP_MPU_TIMER3_BASE (0xfffec700) | ||
63 | #define MPU_TIMER_FREE (1 << 6) | ||
64 | #define MPU_TIMER_CLOCK_ENABLE (1 << 5) | ||
65 | #define MPU_TIMER_AR (1 << 1) | ||
66 | #define MPU_TIMER_ST (1 << 0) | ||
67 | |||
68 | /* | ||
69 | * ---------------------------------------------------------------------------- | ||
57 | * Clocks | 70 | * Clocks |
58 | * ---------------------------------------------------------------------------- | 71 | * ---------------------------------------------------------------------------- |
59 | */ | 72 | */ |
@@ -78,6 +91,7 @@ | |||
78 | 91 | ||
79 | /* DSP clock control */ | 92 | /* DSP clock control */ |
80 | #define DSP_CONFIG_REG_BASE (0xe1008000) | 93 | #define DSP_CONFIG_REG_BASE (0xe1008000) |
94 | #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) | ||
81 | #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) | 95 | #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) |
82 | #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) | 96 | #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) |
83 | 97 | ||
@@ -88,6 +102,7 @@ | |||
88 | */ | 102 | */ |
89 | #define ULPD_REG_BASE (0xfffe0800) | 103 | #define ULPD_REG_BASE (0xfffe0800) |
90 | #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) | 104 | #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) |
105 | #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) | ||
91 | #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) | 106 | #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) |
92 | # define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ | 107 | # define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ |
93 | # define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ | 108 | # define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ |
@@ -268,17 +283,10 @@ | |||
268 | * Processor specific defines | 283 | * Processor specific defines |
269 | * --------------------------------------------------------------------------- | 284 | * --------------------------------------------------------------------------- |
270 | */ | 285 | */ |
271 | #ifdef CONFIG_ARCH_OMAP730 | ||
272 | #include "omap730.h" | ||
273 | #endif | ||
274 | 286 | ||
275 | #ifdef CONFIG_ARCH_OMAP1510 | 287 | #include "omap730.h" |
276 | #include "omap1510.h" | 288 | #include "omap1510.h" |
277 | #endif | ||
278 | |||
279 | #ifdef CONFIG_ARCH_OMAP16XX | ||
280 | #include "omap16xx.h" | 289 | #include "omap16xx.h" |
281 | #endif | ||
282 | 290 | ||
283 | /* | 291 | /* |
284 | * --------------------------------------------------------------------------- | 292 | * --------------------------------------------------------------------------- |
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 6701fd9e5f9b..0d05a7c957d1 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h | |||
@@ -159,6 +159,7 @@ | |||
159 | #define INT_1610_GPIO_BANK3 (41 + IH2_BASE) | 159 | #define INT_1610_GPIO_BANK3 (41 + IH2_BASE) |
160 | #define INT_1610_MMC2 (42 + IH2_BASE) | 160 | #define INT_1610_MMC2 (42 + IH2_BASE) |
161 | #define INT_1610_CF (43 + IH2_BASE) | 161 | #define INT_1610_CF (43 + IH2_BASE) |
162 | #define INT_1610_WAKE_UP_REQ (46 + IH2_BASE) | ||
162 | #define INT_1610_GPIO_BANK4 (48 + IH2_BASE) | 163 | #define INT_1610_GPIO_BANK4 (48 + IH2_BASE) |
163 | #define INT_1610_SPI (49 + IH2_BASE) | 164 | #define INT_1610_SPI (49 + IH2_BASE) |
164 | #define INT_1610_DMA_CH6 (53 + IH2_BASE) | 165 | #define INT_1610_DMA_CH6 (53 + IH2_BASE) |
@@ -238,6 +239,8 @@ | |||
238 | #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) | 239 | #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) |
239 | #define IH_BOARD_BASE (16 + IH_MPUIO_BASE) | 240 | #define IH_BOARD_BASE (16 + IH_MPUIO_BASE) |
240 | 241 | ||
242 | #define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) | ||
243 | |||
241 | #ifndef __ASSEMBLY__ | 244 | #ifndef __ASSEMBLY__ |
242 | extern void omap_init_irq(void); | 245 | extern void omap_init_irq(void); |
243 | #endif | 246 | #endif |
diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h index 88b1fe43ae9e..38a9b95e6a33 100644 --- a/include/asm-arm/arch-omap/omap16xx.h +++ b/include/asm-arm/arch-omap/omap16xx.h | |||
@@ -183,5 +183,37 @@ | |||
183 | #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) | 183 | #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) |
184 | #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) | 184 | #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) |
185 | 185 | ||
186 | /* | ||
187 | * --------------------------------------------------------------------------- | ||
188 | * Watchdog timer | ||
189 | * --------------------------------------------------------------------------- | ||
190 | */ | ||
191 | |||
192 | /* 32-bit Watchdog timer in OMAP 16XX */ | ||
193 | #define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) | ||
194 | #define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) | ||
195 | #define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) | ||
196 | #define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) | ||
197 | #define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) | ||
198 | #define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) | ||
199 | #define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) | ||
200 | #define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) | ||
201 | #define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) | ||
202 | #define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) | ||
203 | |||
204 | #define WCLR_PRE_SHIFT 5 | ||
205 | #define WCLR_PTV_SHIFT 2 | ||
206 | |||
207 | #define WWPS_W_PEND_WSPR (1 << 4) | ||
208 | #define WWPS_W_PEND_WTGR (1 << 3) | ||
209 | #define WWPS_W_PEND_WLDR (1 << 2) | ||
210 | #define WWPS_W_PEND_WCRR (1 << 1) | ||
211 | #define WWPS_W_PEND_WCLR (1 << 0) | ||
212 | |||
213 | #define WSPR_ENABLE_0 (0x0000bbbb) | ||
214 | #define WSPR_ENABLE_1 (0x00004444) | ||
215 | #define WSPR_DISABLE_0 (0x0000aaaa) | ||
216 | #define WSPR_DISABLE_1 (0x00005555) | ||
217 | |||
186 | #endif /* __ASM_ARCH_OMAP16XX_H */ | 218 | #endif /* __ASM_ARCH_OMAP16XX_H */ |
187 | 219 | ||
diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index 17a2c4825f07..ff37bc27e603 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h | |||
@@ -5,7 +5,9 @@ | |||
5 | #ifndef __ASM_ARCH_SYSTEM_H | 5 | #ifndef __ASM_ARCH_SYSTEM_H |
6 | #define __ASM_ARCH_SYSTEM_H | 6 | #define __ASM_ARCH_SYSTEM_H |
7 | #include <linux/config.h> | 7 | #include <linux/config.h> |
8 | #include <asm/mach-types.h> | ||
8 | #include <asm/arch/hardware.h> | 9 | #include <asm/arch/hardware.h> |
10 | #include <asm/mach-types.h> | ||
9 | 11 | ||
10 | static inline void arch_idle(void) | 12 | static inline void arch_idle(void) |
11 | { | 13 | { |
@@ -14,7 +16,24 @@ static inline void arch_idle(void) | |||
14 | 16 | ||
15 | static inline void arch_reset(char mode) | 17 | static inline void arch_reset(char mode) |
16 | { | 18 | { |
17 | omap_writew(1, ARM_RSTCT1); | 19 | |
20 | #ifdef CONFIG_ARCH_OMAP16XX | ||
21 | /* | ||
22 | * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 | ||
23 | * "Global Software Reset Affects Traffic Controller Frequency". | ||
24 | */ | ||
25 | if (cpu_is_omap5912()) { | ||
26 | omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), | ||
27 | DPLL_CTL); | ||
28 | omap_writew(0x8, ARM_RSTCT1); | ||
29 | } | ||
30 | #endif | ||
31 | #ifdef CONFIG_MACH_VOICEBLUE | ||
32 | if (machine_is_voiceblue()) | ||
33 | voiceblue_reset(); | ||
34 | else | ||
35 | #endif | ||
36 | omap_writew(1, ARM_RSTCT1); | ||
18 | } | 37 | } |
19 | 38 | ||
20 | #endif | 39 | #endif |