diff options
author | Stefan Schmidt <stefan@datenfreihafen.org> | 2008-06-12 02:07:22 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-06-12 15:49:38 -0400 |
commit | 3692fd0aaef489b063518b5999c702bada5b6e22 (patch) | |
tree | 5e5c842ca760c74b109580a64263982964adc8d3 /include/asm-arm | |
parent | 62cfcf4f467733a8dc218691c791804a148da887 (diff) |
[ARM] 5091/1: Add missing bitfield include to regs-lcd.h
Macros like Fld() or FShft used in regs-lcd.h are defined in bitfield.h, but
the latter is not included.
Also fix one whitespace issue while being there.
Signed-off-by: Antonio Ospite <ao2@openezx.org>
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-pxa/regs-lcd.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h index f762493f5141..3ba464c913a5 100644 --- a/include/asm-arm/arch-pxa/regs-lcd.h +++ b/include/asm-arm/arch-pxa/regs-lcd.h | |||
@@ -1,5 +1,8 @@ | |||
1 | #ifndef __ASM_ARCH_REGS_LCD_H | 1 | #ifndef __ASM_ARCH_REGS_LCD_H |
2 | #define __ASM_ARCH_REGS_LCD_H | 2 | #define __ASM_ARCH_REGS_LCD_H |
3 | |||
4 | #include <asm/arch/bitfield.h> | ||
5 | |||
3 | /* | 6 | /* |
4 | * LCD Controller Registers and Bits Definitions | 7 | * LCD Controller Registers and Bits Definitions |
5 | */ | 8 | */ |
@@ -69,7 +72,7 @@ | |||
69 | #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ | 72 | #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ |
70 | #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ | 73 | #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ |
71 | #define LCCR0_PDD_S 12 | 74 | #define LCCR0_PDD_S 12 |
72 | #define LCCR0_BM (1 << 20) /* Branch mask */ | 75 | #define LCCR0_BM (1 << 20) /* Branch mask */ |
73 | #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ | 76 | #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ |
74 | #define LCCR0_LCDT (1 << 22) /* LCD panel type */ | 77 | #define LCCR0_LCDT (1 << 22) /* LCD panel type */ |
75 | #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ | 78 | #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ |