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authorTony Lindgren <tony@atomide.com>2006-06-26 19:16:18 -0400
committerTony Lindgren <tony@atomide.com>2006-06-26 19:16:18 -0400
commit22a16f39e36e62f7bd221e5b279ea02fb3c43425 (patch)
tree53921cd85f8a351363cecc790f40e4fd9b5770ef /include/asm-arm
parenta7ca9d2b0199f79480800e18f643328bb43f521d (diff)
ARM: OMAP: Add initial 24xx suspend support
This patch adds support for omap24xx power domains and allows suspend to work. Please note that for some reason core power domain still does not seem to idle. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-omap/irqs.h2
-rw-r--r--include/asm-arm/arch-omap/pm.h33
2 files changed, 35 insertions, 0 deletions
diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h
index 46f2f06eae0c..2542495d8a43 100644
--- a/include/asm-arm/arch-omap/irqs.h
+++ b/include/asm-arm/arch-omap/irqs.h
@@ -258,6 +258,8 @@
258#define INT_24XX_MCBSP1_IRQ_RX 60 258#define INT_24XX_MCBSP1_IRQ_RX 60
259#define INT_24XX_MCBSP2_IRQ_TX 62 259#define INT_24XX_MCBSP2_IRQ_TX 62
260#define INT_24XX_MCBSP2_IRQ_RX 63 260#define INT_24XX_MCBSP2_IRQ_RX 63
261#define INT_24XX_UART1_IRQ 72
262#define INT_24XX_UART2_IRQ 73
261#define INT_24XX_UART3_IRQ 74 263#define INT_24XX_UART3_IRQ 74
262 264
263/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and 265/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h
index 05b003f3a94c..e46623c61a72 100644
--- a/include/asm-arm/arch-omap/pm.h
+++ b/include/asm-arm/arch-omap/pm.h
@@ -299,10 +299,43 @@ enum omap24xx_save_state {
299 OMAP24XX_SLEEP_SAVE_INTC_MIR0, 299 OMAP24XX_SLEEP_SAVE_INTC_MIR0,
300 OMAP24XX_SLEEP_SAVE_INTC_MIR1, 300 OMAP24XX_SLEEP_SAVE_INTC_MIR1,
301 OMAP24XX_SLEEP_SAVE_INTC_MIR2, 301 OMAP24XX_SLEEP_SAVE_INTC_MIR2,
302
303 OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MPU,
304 OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_CORE,
305 OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_GFX,
306 OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_DSP,
307 OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MDM,
308
309 OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MPU,
310 OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_CORE,
311 OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_GFX,
312 OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_DSP,
313 OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MDM,
314
315 OMAP24XX_SLEEP_SAVE_CM_IDLEST1_CORE,
316 OMAP24XX_SLEEP_SAVE_CM_IDLEST2_CORE,
317 OMAP24XX_SLEEP_SAVE_CM_IDLEST3_CORE,
318 OMAP24XX_SLEEP_SAVE_CM_IDLEST4_CORE,
319 OMAP24XX_SLEEP_SAVE_CM_IDLEST_GFX,
320 OMAP24XX_SLEEP_SAVE_CM_IDLEST_WKUP,
321 OMAP24XX_SLEEP_SAVE_CM_IDLEST_CKGEN,
322 OMAP24XX_SLEEP_SAVE_CM_IDLEST_DSP,
323 OMAP24XX_SLEEP_SAVE_CM_IDLEST_MDM,
324
325 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE1_CORE,
326 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE2_CORE,
327 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE3_CORE,
328 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE4_CORE,
329 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_WKUP,
330 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_PLL,
331 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_DSP,
332 OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_MDM,
333
302 OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE, 334 OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE,
303 OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE, 335 OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE,
304 OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE, 336 OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE,
305 OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE, 337 OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE,
338 OMAP24XX_SLEEP_SAVE_CM_ICLKEN3_CORE,
306 OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE, 339 OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE,
307 OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1, 340 OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1,
308 OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1, 341 OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1,