aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-arm
diff options
context:
space:
mode:
authorDave Airlie <airlied@starflyer.(none)>2005-07-07 06:08:27 -0400
committerDave Airlie <airlied@linux.ie>2005-07-07 06:08:27 -0400
commit717cb906bd43a9ac00631d600adda5c6546843a6 (patch)
treef41b250e9e0fa1e664f002fa9c4608d94527f2f2 /include/asm-arm
parent22f579c621e2f264e6d093b07d75f99bc97d5df2 (diff)
parentc101f3136cc98a003d0d16be6fab7d0d950581a6 (diff)
Merge ../linux-2.6/
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-ixp4xx/io.h176
-rw-r--r--include/asm-arm/arch-pxa/debug-macro.S2
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
-rw-r--r--include/asm-arm/arch-s3c2410/audio.h49
-rw-r--r--include/asm-arm/hardware/arm_timer.h21
-rw-r--r--include/asm-arm/mach/arch.h34
-rw-r--r--include/asm-arm/pci.h10
-rw-r--r--include/asm-arm/stat.h2
-rw-r--r--include/asm-arm/system.h16
-rw-r--r--include/asm-arm/tlbflush.h28
10 files changed, 295 insertions, 45 deletions
diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h
index c27b9d3079a7..7495026e2c18 100644
--- a/include/asm-arm/arch-ixp4xx/io.h
+++ b/include/asm-arm/arch-ixp4xx/io.h
@@ -3,7 +3,7 @@
3 * 3 *
4 * Author: Deepak Saxena <dsaxena@plexity.net> 4 * Author: Deepak Saxena <dsaxena@plexity.net>
5 * 5 *
6 * Copyright (C) 2002-2004 MontaVista Software, Inc. 6 * Copyright (C) 2002-2005 MontaVista Software, Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
@@ -383,6 +383,180 @@ __ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count)
383 *vaddr++ = inl(io_addr); 383 *vaddr++ = inl(io_addr);
384} 384}
385 385
386#define __is_io_address(p) (((unsigned long)p >= 0x0) && \
387 ((unsigned long)p <= 0x0000ffff))
388static inline unsigned int
389__ixp4xx_ioread8(void __iomem *port)
390{
391 if (__is_io_address(port))
392 return (unsigned int)__ixp4xx_inb((unsigned int)port);
393 else
394#ifndef CONFIG_IXP4XX_INDIRECT_PCI
395 return (unsigned int)__raw_readb((u32)port);
396#else
397 return (unsigned int)__ixp4xx_readb((u32)port);
398#endif
399}
400
401static inline void
402__ixp4xx_ioread8_rep(u32 port, u8 *vaddr, u32 count)
403{
404 if (__is_io_address(port))
405 __ixp4xx_insb(port, vaddr, count);
406 else
407#ifndef CONFIG_IXP4XX_INDIRECT_PCI
408 __raw_readsb((void __iomem *)port, vaddr, count);
409#else
410 __ixp4xx_readsb(port, vaddr, count);
411#endif
412}
413
414static inline unsigned int
415__ixp4xx_ioread16(void __iomem *port)
416{
417 if (__is_io_address(port))
418 return (unsigned int)__ixp4xx_inw((unsigned int)port);
419 else
420#ifndef CONFIG_IXP4XX_INDIRECT_PCI
421 return le16_to_cpu(__raw_readw((u32)port));
422#else
423 return (unsigned int)__ixp4xx_readw((u32)port);
424#endif
425}
426
427static inline void
428__ixp4xx_ioread16_rep(u32 port, u16 *vaddr, u32 count)
429{
430 if (__is_io_address(port))
431 __ixp4xx_insw(port, vaddr, count);
432 else
433#ifndef CONFIG_IXP4XX_INDIRECT_PCI
434 __raw_readsw((void __iomem *)port, vaddr, count);
435#else
436 __ixp4xx_readsw(port, vaddr, count);
437#endif
438}
439
440static inline unsigned int
441__ixp4xx_ioread32(void __iomem *port)
442{
443 if (__is_io_address(port))
444 return (unsigned int)__ixp4xx_inl((unsigned int)port);
445 else {
446#ifndef CONFIG_IXP4XX_INDIRECT_PCI
447 return le32_to_cpu(__raw_readl((u32)port));
448#else
449 return (unsigned int)__ixp4xx_readl((u32)port);
450#endif
451 }
452}
453
454static inline void
455__ixp4xx_ioread32_rep(u32 port, u32 *vaddr, u32 count)
456{
457 if (__is_io_address(port))
458 __ixp4xx_insl(port, vaddr, count);
459 else
460#ifndef CONFIG_IXP4XX_INDIRECT_PCI
461 __raw_readsl((void __iomem *)port, vaddr, count);
462#else
463 __ixp4xx_readsl(port, vaddr, count);
464#endif
465}
466
467static inline void
468__ixp4xx_iowrite8(u8 value, void __iomem *port)
469{
470 if (__is_io_address(port))
471 __ixp4xx_outb(value, (unsigned int)port);
472 else
473#ifndef CONFIG_IXP4XX_INDIRECT_PCI
474 __raw_writeb(value, (u32)port);
475#else
476 __ixp4xx_writeb(value, (u32)port);
477#endif
478}
479
480static inline void
481__ixp4xx_iowrite8_rep(u32 port, u8 *vaddr, u32 count)
482{
483 if (__is_io_address(port))
484 __ixp4xx_outsb(port, vaddr, count);
485#ifndef CONFIG_IXP4XX_INDIRECT_PCI
486 __raw_writesb((void __iomem *)port, vaddr, count);
487#else
488 __ixp4xx_writesb(port, vaddr, count);
489#endif
490}
491
492static inline void
493__ixp4xx_iowrite16(u16 value, void __iomem *port)
494{
495 if (__is_io_address(port))
496 __ixp4xx_outw(value, (unsigned int)port);
497 else
498#ifndef CONFIG_IXP4XX_INDIRECT_PCI
499 __raw_writew(cpu_to_le16(value), (u32)port);
500#else
501 __ixp4xx_writew(value, (u32)port);
502#endif
503}
504
505static inline void
506__ixp4xx_iowrite16_rep(u32 port, u16 *vaddr, u32 count)
507{
508 if (__is_io_address(port))
509 __ixp4xx_outsw(port, vaddr, count);
510#ifndef CONFIG_IXP4XX_INDIRECT_PCI
511 __raw_readsw((void __iomem *)port, vaddr, count);
512#else
513 __ixp4xx_writesw(port, vaddr, count);
514#endif
515}
516
517static inline void
518__ixp4xx_iowrite32(u32 value, void __iomem *port)
519{
520 if (__is_io_address(port))
521 __ixp4xx_outl(value, (unsigned int)port);
522 else
523#ifndef CONFIG_IXP4XX_INDIRECT_PCI
524 __raw_writel(cpu_to_le32(value), (u32)port);
525#else
526 __ixp4xx_writel(value, (u32)port);
527#endif
528}
529
530static inline void
531__ixp4xx_iowrite32_rep(u32 port, u32 *vaddr, u32 count)
532{
533 if (__is_io_address(port))
534 __ixp4xx_outsl(port, vaddr, count);
535#ifndef CONFIG_IXP4XX_INDIRECT_PCI
536 __raw_readsl((void __iomem *)port, vaddr, count);
537#else
538 __ixp4xx_outsl(port, vaddr, count);
539#endif
540}
541
542#define ioread8(p) __ixp4xx_ioread8(p)
543#define ioread16(p) __ixp4xx_ioread16(p)
544#define ioread32(p) __ixp4xx_ioread32(p)
545
546#define ioread8_rep(p, v, c) __ixp4xx_ioread8_rep(p, v, c)
547#define ioread16_rep(p, v, c) __ixp4xx_ioread16_rep(p, v, c)
548#define ioread32_rep(p, v, c) __ixp4xx_ioread32_rep(p, v, c)
549
550#define iowrite8(v,p) __ixp4xx_iowrite8(v,p)
551#define iowrite16(v,p) __ixp4xx_iowrite16(v,p)
552#define iowrite32(v,p) __ixp4xx_iowrite32(v,p)
553
554#define iowrite8_rep(p, v, c) __ixp4xx_iowrite8_rep(p, v, c)
555#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c)
556#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c)
557
558#define ioport_map(port, nr) ((void __iomem*)port)
559#define ioport_unmap(addr)
386 560
387#endif // __ASM_ARM_ARCH_IO_H 561#endif // __ASM_ARM_ARCH_IO_H
388 562
diff --git a/include/asm-arm/arch-pxa/debug-macro.S b/include/asm-arm/arch-pxa/debug-macro.S
index f288e74b67c2..b6ec68879176 100644
--- a/include/asm-arm/arch-pxa/debug-macro.S
+++ b/include/asm-arm/arch-pxa/debug-macro.S
@@ -11,6 +11,8 @@
11 * 11 *
12*/ 12*/
13 13
14#include "hardware.h"
15
14 .macro addruart,rx 16 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 17 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 18 tst \rx, #1 @ MMU enabled?
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index b5e54a9e9fa7..51f0fe0ac165 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1505,6 +1505,7 @@
1505#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ 1505#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */
1506#define PSSR_RDH (1 << 5) /* Read Disable Hold */ 1506#define PSSR_RDH (1 << 5) /* Read Disable Hold */
1507#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ 1507#define PSSR_PH (1 << 4) /* Peripheral Control Hold */
1508#define PSSR_STS (1 << 3) /* Standby Mode Status */
1508#define PSSR_VFS (1 << 2) /* VDD Fault Status */ 1509#define PSSR_VFS (1 << 2) /* VDD Fault Status */
1509#define PSSR_BFS (1 << 1) /* Battery Fault Status */ 1510#define PSSR_BFS (1 << 1) /* Battery Fault Status */
1510#define PSSR_SSS (1 << 0) /* Software Sleep Status */ 1511#define PSSR_SSS (1 << 0) /* Software Sleep Status */
@@ -1965,6 +1966,7 @@
1965#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ 1966#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
1966#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ 1967#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
1967 1968
1969#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
1968#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ 1970#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
1969#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ 1971#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
1970#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ 1972#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */
diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h
new file mode 100644
index 000000000000..0d276e67f2fb
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/audio.h
@@ -0,0 +1,49 @@
1/* linux/include/asm-arm/arch-s3c2410/audio.h
2 *
3 * (c) 2004-2005 Simtec Electronics
4 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C24XX - Audio platfrom_device info
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Changelog:
14 * 20-Nov-2004 BJD Created file
15 * 07-Mar-2005 BJD Added suspend/resume calls
16*/
17
18#ifndef __ASM_ARCH_AUDIO_H
19#define __ASM_ARCH_AUDIO_H __FILE__
20
21/* struct s3c24xx_iis_ops
22 *
23 * called from the s3c24xx audio core to deal with the architecture
24 * or the codec's setup and control.
25 *
26 * the pointer to itself is passed through in case the caller wants to
27 * embed this in an larger structure for easy reference to it's context.
28*/
29
30struct s3c24xx_iis_ops {
31 struct module *owner;
32
33 int (*startup)(struct s3c24xx_iis_ops *me);
34 void (*shutdown)(struct s3c24xx_iis_ops *me);
35 int (*suspend)(struct s3c24xx_iis_ops *me);
36 int (*resume)(struct s3c24xx_iis_ops *me);
37
38 int (*open)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm);
39 int (*close)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm);
40 int (*prepare)(struct s3c24xx_iis_ops *me, snd_pcm_substream_t *strm, snd_pcm_runtime_t *rt);
41};
42
43struct s3c24xx_platdata_iis {
44 const char *codec_clk;
45 struct s3c24xx_iis_ops *ops;
46 int (*match_dev)(struct device *dev);
47};
48
49#endif /* __ASM_ARCH_AUDIO_H */
diff --git a/include/asm-arm/hardware/arm_timer.h b/include/asm-arm/hardware/arm_timer.h
new file mode 100644
index 000000000000..04be3bdf46b8
--- /dev/null
+++ b/include/asm-arm/hardware/arm_timer.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H
2#define __ASM_ARM_HARDWARE_ARM_TIMER_H
3
4#define TIMER_LOAD 0x00
5#define TIMER_VALUE 0x04
6#define TIMER_CTRL 0x08
7#define TIMER_CTRL_ONESHOT (1 << 0)
8#define TIMER_CTRL_32BIT (1 << 1)
9#define TIMER_CTRL_DIV1 (0 << 2)
10#define TIMER_CTRL_DIV16 (1 << 2)
11#define TIMER_CTRL_DIV256 (2 << 2)
12#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */
13#define TIMER_CTRL_PERIODIC (1 << 6)
14#define TIMER_CTRL_ENABLE (1 << 7)
15
16#define TIMER_INTCLR 0x0c
17#define TIMER_RIS 0x10
18#define TIMER_MIS 0x14
19#define TIMER_BGLOAD 0x18
20
21#endif
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index 3a32e929ec8c..56c6bf4ab0c3 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -26,7 +26,7 @@ struct machine_desc {
26 * page tabe entry */ 26 * page tabe entry */
27 27
28 const char *name; /* architecture name */ 28 const char *name; /* architecture name */
29 unsigned int param_offset; /* parameter page */ 29 unsigned long boot_params; /* tagged list */
30 30
31 unsigned int video_start; /* start of video RAM */ 31 unsigned int video_start; /* start of video RAM */
32 unsigned int video_end; /* end of video RAM */ 32 unsigned int video_end; /* end of video RAM */
@@ -54,38 +54,6 @@ const struct machine_desc __mach_desc_##_type \
54 .nr = MACH_TYPE_##_type, \ 54 .nr = MACH_TYPE_##_type, \
55 .name = _name, 55 .name = _name,
56 56
57#define MAINTAINER(n)
58
59#define BOOT_MEM(_pram,_pio,_vio) \
60 .phys_ram = _pram, \
61 .phys_io = _pio, \
62 .io_pg_offst = ((_vio)>>18)&0xfffc,
63
64#define BOOT_PARAMS(_params) \
65 .param_offset = _params,
66
67#define VIDEO(_start,_end) \
68 .video_start = _start, \
69 .video_end = _end,
70
71#define DISABLE_PARPORT(_n) \
72 .reserve_lp##_n = 1,
73
74#define SOFT_REBOOT \
75 .soft_reboot = 1,
76
77#define FIXUP(_func) \
78 .fixup = _func,
79
80#define MAPIO(_func) \
81 .map_io = _func,
82
83#define INITIRQ(_func) \
84 .init_irq = _func,
85
86#define INIT_MACHINE(_func) \
87 .init_machine = _func,
88
89#define MACHINE_END \ 57#define MACHINE_END \
90}; 58};
91 59
diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h
index 40ffaefbeb1a..e300646fe650 100644
--- a/include/asm-arm/pci.h
+++ b/include/asm-arm/pci.h
@@ -42,6 +42,16 @@ static inline void pcibios_penalize_isa_irq(int irq)
42#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 42#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
43#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 43#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
44 44
45#ifdef CONFIG_PCI
46static inline void pci_dma_burst_advice(struct pci_dev *pdev,
47 enum pci_dma_burst_strategy *strat,
48 unsigned long *strategy_parameter)
49{
50 *strat = PCI_DMA_BURST_INFINITY;
51 *strategy_parameter = ~0UL;
52}
53#endif
54
45#define HAVE_PCI_MMAP 55#define HAVE_PCI_MMAP
46extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 56extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
47 enum pci_mmap_state mmap_state, int write_combine); 57 enum pci_mmap_state mmap_state, int write_combine);
diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h
index ca8e7a8436da..ec4e2c2e3b47 100644
--- a/include/asm-arm/stat.h
+++ b/include/asm-arm/stat.h
@@ -89,6 +89,6 @@ struct stat64 {
89 unsigned long st_ctime_nsec; 89 unsigned long st_ctime_nsec;
90 90
91 unsigned long long st_ino; 91 unsigned long long st_ino;
92}; 92} __attribute__((packed));
93 93
94#endif 94#endif
diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h
index 3d0d2860b6db..2f44b2044214 100644
--- a/include/asm-arm/system.h
+++ b/include/asm-arm/system.h
@@ -85,7 +85,9 @@ struct pt_regs;
85void die(const char *msg, struct pt_regs *regs, int err) 85void die(const char *msg, struct pt_regs *regs, int err)
86 __attribute__((noreturn)); 86 __attribute__((noreturn));
87 87
88void die_if_kernel(const char *str, struct pt_regs *regs, int err); 88struct siginfo;
89void notify_die(const char *str, struct pt_regs *regs, struct siginfo *info,
90 unsigned long err, unsigned long trap);
89 91
90void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, 92void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
91 struct pt_regs *), 93 struct pt_regs *),
@@ -290,7 +292,6 @@ do { \
290}) 292})
291 293
292#ifdef CONFIG_SMP 294#ifdef CONFIG_SMP
293#error SMP not supported
294 295
295#define smp_mb() mb() 296#define smp_mb() mb()
296#define smp_rmb() rmb() 297#define smp_rmb() rmb()
@@ -304,6 +305,8 @@ do { \
304#define smp_wmb() barrier() 305#define smp_wmb() barrier()
305#define smp_read_barrier_depends() do { } while(0) 306#define smp_read_barrier_depends() do { } while(0)
306 307
308#endif /* CONFIG_SMP */
309
307#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) 310#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
308/* 311/*
309 * On the StrongARM, "swp" is terminally broken since it bypasses the 312 * On the StrongARM, "swp" is terminally broken since it bypasses the
@@ -316,9 +319,16 @@ do { \
316 * 319 *
317 * We choose (1) since its the "easiest" to achieve here and is not 320 * We choose (1) since its the "easiest" to achieve here and is not
318 * dependent on the processor type. 321 * dependent on the processor type.
322 *
323 * NOTE that this solution won't work on an SMP system, so explcitly
324 * forbid it here.
319 */ 325 */
326#ifdef CONFIG_SMP
327#error SMP is not supported on SA1100/SA110
328#else
320#define swp_is_buggy 329#define swp_is_buggy
321#endif 330#endif
331#endif
322 332
323static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) 333static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
324{ 334{
@@ -361,8 +371,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
361 return ret; 371 return ret;
362} 372}
363 373
364#endif /* CONFIG_SMP */
365
366#endif /* __ASSEMBLY__ */ 374#endif /* __ASSEMBLY__ */
367 375
368#define arch_align_stack(x) (x) 376#define arch_align_stack(x) (x)
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index 8a864b118569..9387a5e1ffe0 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -235,7 +235,7 @@ extern struct cpu_tlb_fns cpu_tlb;
235 235
236#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) 236#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f)))
237 237
238static inline void flush_tlb_all(void) 238static inline void local_flush_tlb_all(void)
239{ 239{
240 const int zero = 0; 240 const int zero = 0;
241 const unsigned int __tlb_flag = __cpu_tlb_flags; 241 const unsigned int __tlb_flag = __cpu_tlb_flags;
@@ -253,7 +253,7 @@ static inline void flush_tlb_all(void)
253 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero)); 253 asm("mcr%? p15, 0, %0, c8, c5, 0" : : "r" (zero));
254} 254}
255 255
256static inline void flush_tlb_mm(struct mm_struct *mm) 256static inline void local_flush_tlb_mm(struct mm_struct *mm)
257{ 257{
258 const int zero = 0; 258 const int zero = 0;
259 const int asid = ASID(mm); 259 const int asid = ASID(mm);
@@ -282,7 +282,7 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
282} 282}
283 283
284static inline void 284static inline void
285flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) 285local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
286{ 286{
287 const int zero = 0; 287 const int zero = 0;
288 const unsigned int __tlb_flag = __cpu_tlb_flags; 288 const unsigned int __tlb_flag = __cpu_tlb_flags;
@@ -313,7 +313,7 @@ flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
313 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr)); 313 asm("mcr%? p15, 0, %0, c8, c5, 1" : : "r" (uaddr));
314} 314}
315 315
316static inline void flush_tlb_kernel_page(unsigned long kaddr) 316static inline void local_flush_tlb_kernel_page(unsigned long kaddr)
317{ 317{
318 const int zero = 0; 318 const int zero = 0;
319 const unsigned int __tlb_flag = __cpu_tlb_flags; 319 const unsigned int __tlb_flag = __cpu_tlb_flags;
@@ -384,8 +384,24 @@ static inline void clean_pmd_entry(pmd_t *pmd)
384/* 384/*
385 * Convert calls to our calling convention. 385 * Convert calls to our calling convention.
386 */ 386 */
387#define flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma) 387#define local_flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma)
388#define flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e) 388#define local_flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e)
389
390#ifndef CONFIG_SMP
391#define flush_tlb_all local_flush_tlb_all
392#define flush_tlb_mm local_flush_tlb_mm
393#define flush_tlb_page local_flush_tlb_page
394#define flush_tlb_kernel_page local_flush_tlb_kernel_page
395#define flush_tlb_range local_flush_tlb_range
396#define flush_tlb_kernel_range local_flush_tlb_kernel_range
397#else
398extern void flush_tlb_all(void);
399extern void flush_tlb_mm(struct mm_struct *mm);
400extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr);
401extern void flush_tlb_kernel_page(unsigned long kaddr);
402extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);
403extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
404#endif
389 405
390/* 406/*
391 * if PG_dcache_dirty is set for the page, we need to ensure that any 407 * if PG_dcache_dirty is set for the page, we need to ensure that any