diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2005-11-01 14:44:26 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-01 14:44:26 -0500 |
commit | e9b72e43d96a1ea2be0f513c78f16743a835d252 (patch) | |
tree | ed3a2cb9a84f56754ac1e4469c3a58f963b86237 /include/asm-arm | |
parent | 69a857610ad212ce4bcd8e6b13f25408691403de (diff) |
[ARM] 3064/1: start using ixp2000_reg_wrb
Patch from Lennert Buytenhek
Switch the users of ixp2000_reg_write that depend on writes being
flushed out of the write buffer by the time that function returns
over to ixp2000_reg_wrb.
When using XCB=101, writes to the same functional unit are still
guaranteed to complete in order, so we only need to protect against:
- reordering of writes to different functional units
- masking an interrupt and then reenabling the IRQ bit in CPSR
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-ixp2000/system.h | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h index d9d6d9d07e02..ddbbb34b5f95 100644 --- a/include/asm-arm/arch-ixp2000/system.h +++ b/include/asm-arm/arch-ixp2000/system.h | |||
@@ -26,23 +26,24 @@ static inline void arch_reset(char mode) | |||
26 | * RedBoot bank. | 26 | * RedBoot bank. |
27 | */ | 27 | */ |
28 | if (machine_is_ixdp2401()) { | 28 | if (machine_is_ixdp2401()) { |
29 | *IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS) | 29 | ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, |
30 | | IXDP2X01_CPLD_FLASH_INTERN); | 30 | ((0 >> IXDP2X01_FLASH_WINDOW_BITS) |
31 | *IXDP2X01_CPLD_RESET_REG = 0xffffffff; | 31 | | IXDP2X01_CPLD_FLASH_INTERN)); |
32 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); | ||
32 | } | 33 | } |
33 | 34 | ||
34 | /* | 35 | /* |
35 | * On IXDP2801 we need to write this magic sequence to the CPLD | 36 | * On IXDP2801 we need to write this magic sequence to the CPLD |
36 | * to cause a complete reset of the CPU and all external devices | 37 | * to cause a complete reset of the CPU and all external devices |
37 | * and moves the flash bank register back to 0. | 38 | * and move the flash bank register back to 0. |
38 | */ | 39 | */ |
39 | if (machine_is_ixdp2801()) { | 40 | if (machine_is_ixdp2801()) { |
40 | unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; | 41 | unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; |
42 | |||
41 | reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); | 43 | reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); |
42 | *IXDP2X01_CPLD_RESET_REG = reset_reg; | 44 | ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); |
43 | mb(); | 45 | ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); |
44 | *IXDP2X01_CPLD_RESET_REG = 0x80000000; | ||
45 | } | 46 | } |
46 | 47 | ||
47 | *IXP2000_RESET0 = RSTALL; | 48 | ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); |
48 | } | 49 | } |