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authorAlexander Schulz <alex@shark-linux.de>2005-07-16 12:17:18 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-07-16 12:17:18 -0400
commitb7523418f6af9093c462341c08c2233f44f7a28d (patch)
treeb44cc3d485eec69e5c0a29f0404b736fb015b2c7 /include/asm-arm
parent878cf4e1c7be6bffde3ace888a65ac3d43c127bb (diff)
[PATCH] ARM: 2815/1: Shark: new defconfig, fixes with __io and serial ports
Patch from Alexander Schulz This patch brings a new default config file for the shark and fixes a compilation issue with io addressing and a runtime problem with the serial ports, where I corrected a wrong regshift value. These are all shark specific files so I hope it is ok to put them in one patch. Signed-off-by: Alexander Schulz <alex@shark-linux.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-shark/io.h147
1 files changed, 1 insertions, 146 deletions
diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h
index 1e7f26bc2e1d..5e6ed0038b2b 100644
--- a/include/asm-arm/arch-shark/io.h
+++ b/include/asm-arm/arch-shark/io.h
@@ -21,38 +21,8 @@
21 */ 21 */
22#define __PORT_PCIO(x) (!((x) & 0x80000000)) 22#define __PORT_PCIO(x) (!((x) & 0x80000000))
23 23
24/* 24#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
25 * Dynamic IO functions - let the compiler
26 * optimize the expressions
27 */
28#define DECLARE_DYN_OUT(fnsuffix,instr) \
29static inline void __out##fnsuffix (unsigned int value, unsigned int port) \
30{ \
31 unsigned long temp; \
32 __asm__ __volatile__( \
33 "tst %2, #0x80000000\n\t" \
34 "mov %0, %4\n\t" \
35 "addeq %0, %0, %3\n\t" \
36 "str" instr " %1, [%0, %2] @ out" #fnsuffix \
37 : "=&r" (temp) \
38 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
39 : "cc"); \
40}
41 25
42#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
43static inline unsigned sz __in##fnsuffix (unsigned int port) \
44{ \
45 unsigned long temp, value; \
46 __asm__ __volatile__( \
47 "tst %2, #0x80000000\n\t" \
48 "mov %0, %4\n\t" \
49 "addeq %0, %0, %3\n\t" \
50 "ldr" instr " %1, [%0, %2] @ in" #fnsuffix \
51 : "=&r" (temp), "=r" (value) \
52 : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
53 : "cc"); \
54 return (unsigned sz)value; \
55}
56 26
57static inline unsigned int __ioaddr (unsigned int port) \ 27static inline unsigned int __ioaddr (unsigned int port) \
58{ \ 28{ \
@@ -62,123 +32,8 @@ static inline unsigned int __ioaddr (unsigned int port) \
62 return (unsigned int)(IO_BASE + (port)); \ 32 return (unsigned int)(IO_BASE + (port)); \
63} 33}
64 34
65#define DECLARE_IO(sz,fnsuffix,instr) \
66 DECLARE_DYN_OUT(fnsuffix,instr) \
67 DECLARE_DYN_IN(sz,fnsuffix,instr)
68
69DECLARE_IO(char,b,"b")
70DECLARE_IO(short,w,"h")
71DECLARE_IO(long,l,"")
72
73#undef DECLARE_IO
74#undef DECLARE_DYN_OUT
75#undef DECLARE_DYN_IN
76
77/*
78 * Constant address IO functions
79 *
80 * These have to be macros for the 'J' constraint to work -
81 * +/-4096 immediate operand.
82 */
83#define __outbc(value,port) \
84({ \
85 if (__PORT_PCIO((port))) \
86 __asm__ __volatile__( \
87 "strb %0, [%1, %2] @ outbc" \
88 : : "r" (value), "r" (PCIO_BASE), "Jr" (port)); \
89 else \
90 __asm__ __volatile__( \
91 "strb %0, [%1, %2] @ outbc" \
92 : : "r" (value), "r" (IO_BASE), "r" (port)); \
93})
94
95#define __inbc(port) \
96({ \
97 unsigned char result; \
98 if (__PORT_PCIO((port))) \
99 __asm__ __volatile__( \
100 "ldrb %0, [%1, %2] @ inbc" \
101 : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \
102 else \
103 __asm__ __volatile__( \
104 "ldrb %0, [%1, %2] @ inbc" \
105 : "=r" (result) : "r" (IO_BASE), "r" (port)); \
106 result; \
107})
108
109#define __outwc(value,port) \
110({ \
111 unsigned long v = value; \
112 if (__PORT_PCIO((port))) \
113 __asm__ __volatile__( \
114 "strh %0, [%1, %2] @ outwc" \
115 : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" (port)); \
116 else \
117 __asm__ __volatile__( \
118 "strh %0, [%1, %2] @ outwc" \
119 : : "r" (v|v<<16), "r" (IO_BASE), "r" (port)); \
120})
121
122#define __inwc(port) \
123({ \
124 unsigned short result; \
125 if (__PORT_PCIO((port))) \
126 __asm__ __volatile__( \
127 "ldrh %0, [%1, %2] @ inwc" \
128 : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \
129 else \
130 __asm__ __volatile__( \
131 "ldrh %0, [%1, %2] @ inwc" \
132 : "=r" (result) : "r" (IO_BASE), "r" (port)); \
133 result & 0xffff; \
134})
135
136#define __outlc(value,port) \
137({ \
138 unsigned long v = value; \
139 if (__PORT_PCIO((port))) \
140 __asm__ __volatile__( \
141 "str %0, [%1, %2] @ outlc" \
142 : : "r" (v), "r" (PCIO_BASE), "Jr" (port)); \
143 else \
144 __asm__ __volatile__( \
145 "str %0, [%1, %2] @ outlc" \
146 : : "r" (v), "r" (IO_BASE), "r" (port)); \
147})
148
149#define __inlc(port) \
150({ \
151 unsigned long result; \
152 if (__PORT_PCIO((port))) \
153 __asm__ __volatile__( \
154 "ldr %0, [%1, %2] @ inlc" \
155 : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \
156 else \
157 __asm__ __volatile__( \
158 "ldr %0, [%1, %2] @ inlc" \
159 : "=r" (result) : "r" (IO_BASE), "r" (port)); \
160 result; \
161})
162
163#define __ioaddrc(port) \
164({ \
165 unsigned long addr; \
166 if (__PORT_PCIO((port))) \
167 addr = PCIO_BASE + (port); \
168 else \
169 addr = IO_BASE + (port); \
170 addr; \
171})
172
173#define __mem_pci(addr) (addr) 35#define __mem_pci(addr) (addr)
174 36
175#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
176#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
177#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
178#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
179#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
180#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
181
182/* 37/*
183 * Translated address IO functions 38 * Translated address IO functions
184 * 39 *