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authorCatalin Marinas <catalin.marinas@arm.com>2007-09-25 10:22:24 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-01-26 09:41:28 -0500
commit25ebee020bd34d1f4c5678538204f0b10bf9f6d5 (patch)
treeb9b04ddf0b9916922a3cba47a7f64f44cd0b28ff /include/asm-arm/vfp.h
parentc98929c07a01c9ec2e1e5253456acc7168da8b66 (diff)
[ARM] 4583/1: ARMv7: Add VFPv3 support
This patch adds the support for VFPv3 (the kernel currently supports VFPv2). The main difference is 32 double registers (compared to 16). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/vfp.h')
-rw-r--r--include/asm-arm/vfp.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/include/asm-arm/vfp.h b/include/asm-arm/vfp.h
index 9d474d47b266..5f9a2cb3d452 100644
--- a/include/asm-arm/vfp.h
+++ b/include/asm-arm/vfp.h
@@ -7,6 +7,8 @@
7 7
8#define FPSID cr0 8#define FPSID cr0
9#define FPSCR cr1 9#define FPSCR cr1
10#define MVFR1 cr6
11#define MVFR0 cr7
10#define FPEXC cr8 12#define FPEXC cr8
11#define FPINST cr9 13#define FPINST cr9
12#define FPINST2 cr10 14#define FPINST2 cr10
@@ -70,6 +72,10 @@
70#define FPSCR_IXC (1<<4) 72#define FPSCR_IXC (1<<4)
71#define FPSCR_IDC (1<<7) 73#define FPSCR_IDC (1<<7)
72 74
75/* MVFR0 bits */
76#define MVFR0_A_SIMD_BIT (0)
77#define MVFR0_A_SIMD_MASK (0xf << MVFR0_A_SIMD_BIT)
78
73/* Bit patterns for decoding the packaged operation descriptors */ 79/* Bit patterns for decoding the packaged operation descriptors */
74#define VFPOPDESC_LENGTH_BIT (9) 80#define VFPOPDESC_LENGTH_BIT (9)
75#define VFPOPDESC_LENGTH_MASK (0x07 << VFPOPDESC_LENGTH_BIT) 81#define VFPOPDESC_LENGTH_MASK (0x07 << VFPOPDESC_LENGTH_BIT)