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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-07-27 05:10:58 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-27 05:10:58 -0400
commitdaf93dd55c48b65ab2f1907e0fc5ef994896c787 (patch)
tree38465ea53d1861c7583193b7bb031b20bf05c453 /include/asm-arm/thread_info.h
parent6cab48602996cdbcb277375a8107d53e21e8c9b9 (diff)
[ARM] fix VIPT/VIVT macro optimisations, add comments
cacheflush.h was doing: ... VIVT only stuff ... VIPT only stuff ... VIVT or VIPT stuff which is clearly bogus - we would only ever use the "VIVT or VIPT" case when both VIVT and VIPT are not selected. Fix this. Add comments to each case, including noting the impossibility of correctly detecting the cache type of ARM926 and ARMv6 cores from the cache type register in the "VIVT or VIPT" case. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/thread_info.h')
0 files changed, 0 insertions, 0 deletions