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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-06-29 13:24:21 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-06-29 13:24:21 -0400
commit8799ee9f49f6171fd58f4d64f8c067ca49006a5d (patch)
treeb746b8800bc99633f31505d151624c8ccd75cd47 /include/asm-arm/procinfo.h
parent326764a85b7676388db3ebad6488f312631d7661 (diff)
[ARM] Set bit 4 on section mappings correctly depending on CPU
On some CPUs, bit 4 of section mappings means "update the cache when written to". On others, this bit is required to be one, and others it's required to be zero. Finally, on ARMv6 and above, setting it turns on "no execute" and prevents speculative prefetches. With all these combinations, no one value fits all CPUs, so we have to pick a value depending on the CPU type, and the area we're mapping. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/procinfo.h')
-rw-r--r--include/asm-arm/procinfo.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h
index 842526055225..edb7b6502fcf 100644
--- a/include/asm-arm/procinfo.h
+++ b/include/asm-arm/procinfo.h
@@ -29,7 +29,8 @@ struct processor;
29struct proc_info_list { 29struct proc_info_list {
30 unsigned int cpu_val; 30 unsigned int cpu_val;
31 unsigned int cpu_mask; 31 unsigned int cpu_mask;
32 unsigned long __cpu_mmu_flags; /* used by head.S */ 32 unsigned long __cpu_mm_mmu_flags; /* used by head.S */
33 unsigned long __cpu_io_mmu_flags; /* used by head.S */
33 unsigned long __cpu_flush; /* used by head.S */ 34 unsigned long __cpu_flush; /* used by head.S */
34 const char *arch_name; 35 const char *arch_name;
35 const char *elf_name; 36 const char *elf_name;