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authorBen Dooks <ben-linux@fluff.org>2007-02-11 12:31:01 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-11 12:36:09 -0500
commita21765a70ec06be175d3997320a83fa66fcc8955 (patch)
tree24bdbf437a9bd5b7c1af05898f5aa25dccf67fe9 /include/asm-arm/plat-s3c24xx/irq.h
parentd19494b187b20e363f9b434b9ceab4159ac88324 (diff)
[ARM] 4157/2: S3C24XX: move arch/arch/mach-s3c2410 into cpu components
The following patch and script moves the arch/arm/mach-s3c2410 directory into arch/arm/plat-s3c24xx for the generic core code and inti arch/arm/mach-s3c{cpu} for the cpu/machine support files Include directory include/asm-arm/plat-s3c24xx is added for the core include files. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/plat-s3c24xx/irq.h')
-rw-r--r--include/asm-arm/plat-s3c24xx/irq.h107
1 files changed, 107 insertions, 0 deletions
diff --git a/include/asm-arm/plat-s3c24xx/irq.h b/include/asm-arm/plat-s3c24xx/irq.h
new file mode 100644
index 000000000000..8af6d9579b31
--- /dev/null
+++ b/include/asm-arm/plat-s3c24xx/irq.h
@@ -0,0 +1,107 @@
1/* linux/include/asm-arm/plat-s3c24xx/irq.h
2 *
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for S3C24XX CPU IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#define irqdbf(x...)
14#define irqdbf2(x...)
15
16#define EXTINT_OFF (IRQ_EINT4 - 4)
17
18extern struct irq_chip s3c_irq_level_chip;
19
20static inline void
21s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
22 int subcheck)
23{
24 unsigned long mask;
25 unsigned long submask;
26
27 submask = __raw_readl(S3C2410_INTSUBMSK);
28 mask = __raw_readl(S3C2410_INTMSK);
29
30 submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
31
32 /* check to see if we need to mask the parent IRQ */
33
34 if ((submask & subcheck) == subcheck) {
35 __raw_writel(mask | parentbit, S3C2410_INTMSK);
36 }
37
38 /* write back masks */
39 __raw_writel(submask, S3C2410_INTSUBMSK);
40
41}
42
43static inline void
44s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
45{
46 unsigned long mask;
47 unsigned long submask;
48
49 submask = __raw_readl(S3C2410_INTSUBMSK);
50 mask = __raw_readl(S3C2410_INTMSK);
51
52 submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
53 mask &= ~parentbit;
54
55 /* write back masks */
56 __raw_writel(submask, S3C2410_INTSUBMSK);
57 __raw_writel(mask, S3C2410_INTMSK);
58}
59
60
61static inline void
62s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
63{
64 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
65
66 s3c_irqsub_mask(irqno, parentmask, group);
67
68 __raw_writel(bit, S3C2410_SUBSRCPND);
69
70 /* only ack parent if we've got all the irqs (seems we must
71 * ack, all and hope that the irq system retriggers ok when
72 * the interrupt goes off again)
73 */
74
75 if (1) {
76 __raw_writel(parentmask, S3C2410_SRCPND);
77 __raw_writel(parentmask, S3C2410_INTPND);
78 }
79}
80
81static inline void
82s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
83{
84 unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
85
86 __raw_writel(bit, S3C2410_SUBSRCPND);
87
88 /* only ack parent if we've got all the irqs (seems we must
89 * ack, all and hope that the irq system retriggers ok when
90 * the interrupt goes off again)
91 */
92
93 if (1) {
94 __raw_writel(parentmask, S3C2410_SRCPND);
95 __raw_writel(parentmask, S3C2410_INTPND);
96 }
97}
98
99/* exported for use in arch/arm/mach-s3c2410 */
100
101#ifdef CONFIG_PM
102extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
103#else
104#define s3c_irq_wake NULL
105#endif
106
107extern int s3c_irqext_type(unsigned int irq, unsigned int type);