Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (60 commits)
  [ARM] 4524/1: S3C: Move register out of include/asm-arm/arch-s3c2410
  [ARM] 4523/1: S3C: Remove FIFO_MAX from uncompression headers
  [ARM] 4522/1: S3C: split include/asm-arm/arch/memory.h
  [ARM] 4521/2: S3C: Reorganise VA mapping headers
  [ARM] 4520/1: S3C: Remove old VA values from static map
  [ARM] 4519/1: S3C: split S3C2400 values out of S3C24XX map.h
  [ARM] 4518/1: S3C: Rename watchdog configuration options
  [ARM] 4517/1: S3C: Fix debug macros for ARM926 output
  [ARM] 4516/1: S3C: Fix uncompressor serial output for ARM926
  [ARM] 4515/1: S3C: Move uncompress code to plat-s3c
  [ARM] 4514/1: S3C: Rename DEBUG_S3C2410_PORT and DEBUG_S3C_UART
  [ARM] 4513/1: S3C: Rename CONFIG_S3C2410_LOWLEVEL_UART_PORT
  [ARM] 4512/1: S3C: rename the debug macros for per-cpu updates
  [ARM] 4511/1: S3C: updated LLSERIAL Kconfig defines for CPU support
  [ARM] 4510/1: S3C: split debug-macro support into plat-s3c
  [ARM] 4509/1: S3C: Create initial arch/arm/plat-s3c
  [ARM] 4508/1: S3C: Move items to include/asm-arm/plat-s3c
  [ARM] 4461/1: MXC platform and i.MX31ADS core support
  [ARM] 4507/1: pxa2xx clock_event_device
  [ARM] 4497/1: Only allow safe cache configurations on ARMv6 and later
  ...

1 files changed, 60 insertions, 0 deletions

diff --git a/include/asm-arm/plat-s3c/regs-adc.h b/include/asm-arm/plat-s3c/regs-adc.h
new file mode 100644
index 000000000000..c7f231963e76
--- /dev/null
+++ b/include/asm-arm/plat-s3c/regs-adc.h
@@ -0,0 +1,60 @@
+/* linux/include/asm-arm/arch-s3c2410/regs-adc.h
+ *
+ * Copyright (c) 2004 Shannon Holland <holland@loser.net>
+ *
+ * This program is free software; yosu can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 ADC registers
+*/
+
+#ifndef __ASM_ARCH_REGS_ADC_H
+#define __ASM_ARCH_REGS_ADC_H "regs-adc.h"
+
+#define S3C2410_ADCREG(x) (x)
+
+#define S3C2410_ADCCON     S3C2410_ADCREG(0x00)
+#define S3C2410_ADCTSC     S3C2410_ADCREG(0x04)
+#define S3C2410_ADCDLY     S3C2410_ADCREG(0x08)
+#define S3C2410_ADCDAT0    S3C2410_ADCREG(0x0C)
+#define S3C2410_ADCDAT1    S3C2410_ADCREG(0x10)
+
+
+/* ADCCON Register Bits */
+#define S3C2410_ADCCON_ECFLG            (1<<15)
+#define S3C2410_ADCCON_PRSCEN           (1<<14)
+#define S3C2410_ADCCON_PRSCVL(x)        (((x)&0xFF)<<6)
+#define S3C2410_ADCCON_PRSCVLMASK       (0xFF<<6)
+#define S3C2410_ADCCON_SELMUX(x)        (((x)&0x7)<<3)
+#define S3C2410_ADCCON_MUXMASK          (0x7<<3)
+#define S3C2410_ADCCON_STDBM            (1<<2)
+#define S3C2410_ADCCON_READ_START       (1<<1)
+#define S3C2410_ADCCON_ENABLE_START     (1<<0)
+#define S3C2410_ADCCON_STARTMASK        (0x3<<0)
+
+
+/* ADCTSC Register Bits */
+#define S3C2410_ADCTSC_YM_SEN           (1<<7)
+#define S3C2410_ADCTSC_YP_SEN           (1<<6)
+#define S3C2410_ADCTSC_XM_SEN           (1<<5)
+#define S3C2410_ADCTSC_XP_SEN           (1<<4)
+#define S3C2410_ADCTSC_PULL_UP_DISABLE  (1<<3)
+#define S3C2410_ADCTSC_AUTO_PST         (1<<2)
+#define S3C2410_ADCTSC_XY_PST(x)        (((x)&0x3)<<0)
+
+/* ADCDAT0 Bits */
+#define S3C2410_ADCDAT0_UPDOWN          (1<<15)
+#define S3C2410_ADCDAT0_AUTO_PST        (1<<14)
+#define S3C2410_ADCDAT0_XY_PST          (0x3<<12)
+#define S3C2410_ADCDAT0_XPDATA_MASK     (0x03FF)
+
+/* ADCDAT1 Bits */
+#define S3C2410_ADCDAT1_UPDOWN          (1<<15)
+#define S3C2410_ADCDAT1_AUTO_PST        (1<<14)
+#define S3C2410_ADCDAT1_XY_PST          (0x3<<12)
+#define S3C2410_ADCDAT1_YPDATA_MASK     (0x03FF)
+
+#endif /* __ASM_ARCH_REGS_ADC_H */
+
+